S9S12P64J0MFT Freescale Semiconductor, S9S12P64J0MFT Datasheet - Page 82
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S9S12P64J0MFT
Manufacturer Part Number
S9S12P64J0MFT
Description
MCU 64K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of S9S12P64J0MFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
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1. Read: Anytime
Port Integration Module (S12PPIMV1)
2.3.33
82
Address 0x0251
Write:Never, writes to this register have no effect.
Field
PTM
PTM
PTM
PTM
Reset
3
2
1
0
W
R
Port M general purpose input/output data—Data Register, SPI SS input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port M general purpose input/output data—Data Register, SPI MISO input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port M general purpose input/output data—Data Register, CAN TXCAN output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port M general purpose input/output data—Data Register, CAN RXCAN input
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SPI function takes precedence over the general purpose I/O function if enabled.
• The SPI function takes precedence over the general purpose I/O function if enabled.
• The CAN function takes precedence over the general purpose I/O function if enabled.
• The CAN function takes precedence over the general purpose I/O function if enabled.
Port M Input Register (PTIM)
0
u
7
= Unimplemented or Reserved
Table 2-28. PTM Register Field Descriptions (continued)
0
u
6
Figure 2-31. Port M Input Register (PTIM)
S12P-Family Reference Manual, Rev. 1.13
PTIM5
5
u
PTIM4
u
4
Description
u = Unaffected by reset
PTIM3
u
3
PTIM2
u
2
Freescale Semiconductor
PTIM1
u
1
Access: User read
PTIM0
u
0
(1)
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