MC9S12P64CFT Freescale Semiconductor, MC9S12P64CFT Datasheet - Page 260
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MC9S12P64CFT
Manufacturer Part Number
MC9S12P64CFT
Description
MCU 16BIT 64K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of MC9S12P64CFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Freescale’s Scalable Controller Area Network (S12MSCANV3)
8.3.2.3
The CANBTR0 register configures various CAN bus timing parameters of the MSCAN module.
1. Read: Anytime
260
Module Base + 0x0002
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1)
SJW[1:0]
BRP[5:0]
WUPM
SLPAK
INITAK
Field
Field
7-6
5-0
2
1
0
Reset:
W
R
Wake-Up Mode — If WUPE in CANCTL0 is enabled, this bit defines whether the integrated low-pass filter is
applied to protect the MSCAN from spurious wake-up (see
0 MSCAN wakes up on any dominant level on the CAN bus
1 MSCAN wakes up only in case of a dominant pulse on the CAN bus that has a length of T
Sleep Mode Acknowledge — This flag indicates whether the MSCAN module has entered sleep mode (see
Section 8.4.5.5, “MSCAN Sleep
Sleep mode is active when SLPRQ = 1 and SLPAK = 1. Depending on the setting of WUPE, the MSCAN will
clear the flag if it detects activity on the CAN bus while in sleep mode.
0 Running — The MSCAN operates normally
1 Sleep mode active — The MSCAN has entered sleep mode
Initialization Mode Acknowledge — This flag indicates whether the MSCAN module is in initialization mode
(see
mode request. Initialization mode is active when INITRQ = 1 and INITAK = 1. The registers CANCTL1,
CANBTR0, CANBTR1, CANIDAC, CANIDAR0–CANIDAR7, and CANIDMR0–CANIDMR7 can be written only by
the CPU when the MSCAN is in initialization mode.
0 Running — The MSCAN operates normally
1 Initialization mode active — The MSCAN has entered initialization mode
Synchronization Jump Width — The synchronization jump width defines the maximum number of time quanta
(Tq) clock cycles a bit can be shortened or lengthened to achieve resynchronization to data transitions on the
CAN bus (see
Baud Rate Prescaler — These bits determine the time quanta (Tq) clock which is used to build up the bit timing
(see
MSCAN Bus Timing Register 0 (CANBTR0)
SJW1
Table
Section 8.4.4.5, “MSCAN Initialization
0
7
8-7).
Table 8-4. CANCTL1 Register Field Descriptions (continued)
Table
Figure 8-6. MSCAN Bus Timing Register 0 (CANBTR0)
SJW1
SJW0
0
0
6
Table 8-5. CANBTR0 Register Field Descriptions
8-6).
Table 8-6. Synchronization Jump Width
S12P-Family Reference Manual, Rev. 1.13
BRP5
Mode”). It is used as a handshake flag for the SLPRQ sleep mode request.
0
5
Mode”). It is used as a handshake flag for the INITRQ initialization
BRP4
SJW0
0
4
0
Description
Description
Section 8.4.5.5, “MSCAN Sleep
BRP3
3
0
Synchronization Jump Width
BRP2
0
2
1 Tq clock cycle
Access: User read/write
Freescale Semiconductor
BRP1
0
1
Mode”).
wup
BRP0
0
0
(1)
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