MC9S12P64CFT Freescale Semiconductor, MC9S12P64CFT Datasheet - Page 450
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MC9S12P64CFT
Manufacturer Part Number
MC9S12P64CFT
Description
MCU 16BIT 64K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of MC9S12P64CFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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128 KByte Flash Module (S12FTMRC128K1V1)
All bits in the FRSV7 register read 0 and are not writable.
13.4
13.4.1
The FTMRC128K1 module provides the modes of operation shown in
is determined by module-level inputs and affects the FCLKDIV, FCNFG, and DFPROT registers, Scratch
RAM writes, and the command set availability (see
13.4.2
The version ID word is stored in the IFR at address 0x0_40B6. The contents of the word are defined in
Table
13.4.3
Flash command operations are used to modify Flash memory contents.
The next sections describe:
450
Offset Module Base + 0x0013
Reset
•
13-26.
W
R
VERNUM: Version number. The first version is number 0b_0001 with both 0b_0000 and 0b_1111
meaning ‘none’.
Functional Description
Modes of Operation
IFR Version ID Word
Flash Command Operations
0
0
7
= Unimplemented or Reserved
0
0
6
Figure 13-25. Flash Reserved7 Register (FRSV7)
Table 13-25. Modes and Mode Control Inputs
S12P-Family Reference Manual, Rev. 1.13
Table 13-26. IFR Version ID Fields
Operating
Reserved
0
0
5
Normal:
Special:
Mode
[15:4]
0
0
4
Table
mmc_mode_ss_t2
FTMRC Input
13-27).
VERNUM
[3:0]
0
0
3
0
1
Table
0
0
2
13-25. The operating mode
Freescale Semiconductor
0
0
1
0
0
0
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