MCHC908MR8CFAE Freescale Semiconductor, MCHC908MR8CFAE Datasheet - Page 313

• Manufacturer Part Number: MCHC908MR8CFAE
• Description: IC MCU 8K FLASH 8MHZ PWM 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908MR8CFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 16
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

18.4.1 ADC Port I/O Pins
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
INTERRUPT
ADC
INTERNAL
DATA BUS
INTERRUPT
LOGIC
AIEN
READ PTA
PTA6/ATD6:PTA0/ATD6 are general-purpose input/output (I/O) pins
that are shared with the ADC channels.
The channel select bits define which ADC channel/port pin will be used
as the input signal. The ADC overrides the port logic when that port is
selected by the ADC multiplexer. The remaining ADC channels/port pins
are controlled by the port logic and can be used as general-purpose
input/output (I/O) pins. Writes to the port register or data direction
register (DDR) will not have any effect on the port pin that is selected by
the ADC. Read of a port pin which is in use by the ADC will return a
logic 0.
CONVERSION
COMPLETE
CGMXCLK
Figure 18-1. ADC Block Diagram
f
OP
Analog-to-Digital Converter (ADC)
ADC CLOCK
ADC DATA REGISTERS
ADIV[2:0]
GENERATOR
CLOCK
ADC
ADICLK
ADC VOLTAGE IN
ADVIN
DISABLE
Analog-to-Digital Converter (ADC)
CHANNEL
SELECT
ADC CHANNEL X
Functional Description
PTAx
Technical Data
ADCH6:ADCH0
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