MCHC908MR8CFAE Freescale Semiconductor, MCHC908MR8CFAE Datasheet - Page 332

• Manufacturer Part Number: MCHC908MR8CFAE
• Description: IC MCU 8K FLASH 8MHZ PWM 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908MR8CFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 16
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Break (BRK)
20.4.2 CPU During Break Interrupts
20.4.3 TIM During Break Interrupts
20.4.4 COP During Break Interrupts
Technical Data
332
Note: Writing a logic 0 clears
$FE0
$FE0
D
E
Break Address Regis-
Break Status and
Control Register
ter Low (BRKL)
See page 334.
See page 333.
(BRKSCR)
BW.
The CPU starts a break interrupt by:
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
A break interrupt stops the timer counters.
The COP is disabled during a break interrupt when V
the RST pin.
Read
Read
Write
Write
Re-
set:
Re-
set:
•
•
:
:
:
:
Figure 20-2. I/O Register Summary
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC and $FFFD ($FEFC and
$FEFD in monitor mode)
BRKE
Bit 7
0
0
= Unimplemented
BRKA
6
0
0
Break (BRK)
5
0
0
0
R
4
0
0
0
= Reserved
3
0
0
0
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
2
0
0
0
TST
is present on
1
0
0
0
Bit 0
0
0
0