MC908LJ24CFQE Freescale Semiconductor, MC908LJ24CFQE Datasheet - Page 326

• Manufacturer Part Number: MC908LJ24CFQE
• Description: IC MCU 24K FLASH 8MHZ SPI 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LJ24CFQE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SPI
• Peripherals: LCD, LVD, POR, PWM
• Number Of I /o: 48
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Controller Family/series: HC08
• No. Of I/o's: 48
• Ram Memory Size: 768Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08LJ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 4
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Multi-Master IIC Interface (MMIIC)
15.5.4 Multi-Master IIC Status Register (MMSR)
Data Sheet
326
Address:
MMRXIF — Multi-Master IIC Receive Interrupt Flag
Reset:
Read: MMRXIF
Write:
This flag is set after the data receive register (MMDRR) is loaded with
a new received data. Once the MMDRR is loaded with received data,
no more received data can be loaded to the MMDRR register until the
CPU reads the data from the MMDRR to clear MMRXBF flag.
MMRXIF generates an interrupt request to CPU if the MMIEN bit in
MMCR is also set. This bit is cleared by writing "0" to it or by reset; or
when the MMEN = 0.
1 = New data in data receive register (MMDRR)
0 = No data received
Figure 15-5. Multi-Master IIC Status Register (MMSR)
$006D
MMBR2
Bit 7
Multi-Master IIC Interface (MMIIC)
0
0
0
0
0
0
1
1
1
1
= Unimplemented
MMTXIF MMATCH MMSRW MMRXAK
6
0
0
MMBR1
Table 15-2. Baud Rate Select
0
0
1
1
0
0
1
1
5
0
MMBR0
0
1
0
1
0
1
0
1
4
0
Internal bus clock ÷ 8
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
Internal bus clock ÷ 128
Internal bus clock ÷ 256
Internal bus clock ÷ 512
Internal bus clock ÷ 1024
MC68HC908LJ24/LK24 — Rev. 2.1
3
1
Baud Rate
Freescale Semiconductor
2
0
0
MMTXBE MMRXBF
1
1
Bit 0
0