R5F21356CNFP#U0 Renesas Electronics America, R5F21356CNFP#U0 Datasheet - Page 252
R5F21356CNFP#U0
Manufacturer Part Number
R5F21356CNFP#U0
Description
MCU 1KB FLASH 32K ROM 52-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/35Cr
Datasheet
1.R5F21356CNFPU0.pdf
(762 pages)
Specifications of R5F21356CNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
47
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Manufacturer
Quantity
Price
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R8C/35C Group
REJ09B0567-0100 Rev.1.00 Dec. 14, 2009
Page 219 of 725
17. Timer RA
Timer RA is an 8-bit timer with an 8-bit prescaler.
17.1
Figure 17.1
Table 17.1
TRAIO pin
TRAO pin
TRAIO
TRAO
The prescaler and timer each consist of a reload register and counter. The reload register and counter are allocated
at the same address, and can be accessed when accessing registers TRAPRE and TRA (refer to Tables 17.2 to 17.6
the Specifications of Each Mode).
The count source for timer RA is the operating clock that regulates the timing of timer operations such as counting
and reloading.
Figure 17.1 shows a Timer RA Block Diagram. Table 17.1 lists Pin Configuration of Timer RA.
Timer RA contains the following five operating modes:
• Timer mode:
• Pulse output mode:
• Event counter mode:
• Pulse width measurement mode: The timer measures the pulse width of an external pulse.
• Pulse period measurement mode: The timer measures the pulse period of an external pulse.
Pin Name
f32
f1
f8
(1)
(2)
TIPF1 to TIPF0 bits
Overview
Event input enabled at INT2 level
= 01b
= 10b
= 11b
Notes:
TCK2 to TCK0 bit
fOCO
1. Bits TRAIOSEL0 and TRAIOSEL1 in the TRASR register are used to select which pin is assigned.
2. Bits TRAOSEL0 and TRAOSEL1 in the TRASR register are used to select which pin is assigned.
3. The POL bit in the INT2IC register is used to select the INT2 level when the event input is enabled.
fC32
Event enabled for “L” period of
fC
f1
f8
f2
Event input always enabled
= 000b
= 001b
= 010b
= 011b
= 100b
= 110b
TRCIOD (timer RC output)
Pin Configuration of Timer RA
Timer RA Block Diagram
Digital
filter
P1_5, P1_7, or P3_2
P3_0, P3_7, or P5_6
TIPF1 to TIPF0 bits
= other than
Assigned Pin
= 00b
TOENA bit
000b
TIOGT1 to TIOGT0 bits
(3)
= 00b
= 01b
= 10b
switching
Polarity
The timer counts the internal count source.
The timer counts the internal count source and outputs pulses which invert the
polarity by underflow of the timer.
The timer counts external pulses.
TMOD2 to TMOD0
= other than 010b
TMOD2 to TMOD0 = 001b
TOPCR bit
TMOD2 to TMOD0
= 010b
TCSTF, TSTOP: TRACR register
TEDGSEL, TOPCR, TOENA, TIPF1, TIPF0, TIOGT1, TIOGT0: TRAIOC register
TMOD2 to TMOD0, TCK2 to TCK0, TCKCUT: TRAMR register
Output
TCKCUT
I/O
I/O
TMOD2 to TMOD0
bit
= 011b or 100b
TCSTF
bit
TEDGSEL = 1
TEDGSEL = 0
Function differs according to the mode.
Refer to descriptions of individual modes
for details
TRAPRE register
Count control
register
Reload
(prescaler)
circle
Counter
Q
Q
Data bus
completion signal
flip-flop
Toggle
Measurement
CLR
Reload
register
TRA register
CK
Counter
(timer)
Function
Write to TRAMR register
Write 1 to TSTOP bit
Underflow signal
Timer RA interrupt
17. Timer RA
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