MC9S12XET256MAL Freescale Semiconductor, MC9S12XET256MAL Datasheet - Page 875

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MC9S12XET256MAL

Manufacturer Part Number
MC9S12XET256MAL
Description
MCU 16BIT 256K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XET256MAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Cpu Family
HCS12X
Device Core Size
16b
Frequency (max)
50MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
16KB
# I/os (max)
91
Number Of Timers - General Purpose
25
Operating Supply Voltage (typ)
1.8/2.8/5V
Operating Supply Voltage (max)
1.98/2.9/5.5V
Operating Supply Voltage (min)
1.72/2.7/3.13V
On-chip Adc
16-chx12-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
16KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Upon clearing CCIF to launch the Erase All Blocks command, the Memory Controller will erase the entire
Flash memory space and verify that it is erased. If the Memory Controller verifies that the entire Flash
memory space was properly erased, security will be released. During the execution of this command
(CCIF=0) the user must not write to any Flash module register. The CCIF flag will set after the Erase All
Blocks operation has completed.
24.4.2.8
The Erase P-Flash Block operation will erase all addresses in a P-Flash block.
Upon clearing CCIF to launch the Erase P-Flash Block command, the Memory Controller will erase the
selected P-Flash block and verify that it is erased. The CCIF flag will set after the Erase P-Flash Block
operation has completed.
Freescale Semiconductor
1. As found in the memory map for FTM256K2.
FERSTAT
Register
FSTAT
Erase P-Flash Block Command
Table 24-47. Erase P-Flash Block Command FCCOB Requirements
CCOBIX[2:0]
CCOBIX[2:0]
Table 24-45. Erase All Blocks Command FCCOB Requirements
MGSTAT1
MGSTAT0
EPVIOLIF
ACCERR
Error Bit
FPVIOL
000
000
001
Table 24-46. Erase All Blocks Command Error Handling
MC9S12XE-Family Reference Manual , Rev. 1.23
Set if CCOBIX[2:0] != 000 at command launch
Set if command not available in current mode (see
Set if any area of the P-Flash memory is protected
Set if any errors have been encountered during the verify operation
Set if any non-correctable errors have been encountered during the verify
operation
Set if any area of the buffer RAM EEE partition is protected
Global address [15:0] in P-Flash block to be erased
1
0x08
0x09
FCCOB Parameters
FCCOB Parameters
Error Condition
Chapter 24 128 KByte Flash Module (S12XFTM128K2V1)
Global address [22:16] to
identify P-Flash block
Not required
Table
24-30)
(1)
875

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