MC908GT16CBE Freescale Semiconductor, MC908GT16CBE Datasheet - Page 97
![IC MCU 16K FLASH 8MHZ SPI 42SDIP](/photos/12/38/123871/mc908gt16cbe_sml.jpg)
MC908GT16CBE
Manufacturer Part Number
MC908GT16CBE
Description
IC MCU 16K FLASH 8MHZ SPI 42SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GT8CFBE.pdf
(292 pages)
Specifications of MC908GT16CBE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
36
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Controller Family/series
HC08
No. Of I/o's
34
Ram Memory Size
512Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GT
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
30
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Package
42SPDIP
Family Name
HC08
Maximum Speed
8 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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Freescale Semiconductor
$0038
$0039
$003A
Addr.
Reset
OSCENINSTOP = 0,
STOP = 1
EXTCLKEN = 0
CMF = 1
CMON = 0
CMON = 1
CS = 0
CS = 1
ICGON = 0
ICGON = 1
ICGS = 0
ECGON = 0
ECGS = 0
IOFF = 1
EOFF = 1
N = written
TRIM = written
—
0, 1
0*, 1*
(0), (1)
us, uc, uw Register bit cannot be set, cleared, or written (respectively) in the given condition.
Condition
ICG DCO Stage Control
Register Name
ICG Divider Control
Register bit is unaffected by the given condition.
Register bit is forced clear or set (respectively) in the given condition.
Register bit is temporarily forced clear or set (respectively) in the given condition.
Register bit must be clear or set (respectively) for the given condition to occur.
Register (ICGDVR)
Register (ICGDSR)
ICG Trim Register
See page 100.
See page 100.
See page 100.
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
Figure 7-11. ICG Module I/O Register Summary (Continued)
(ICGTR)
Table 7-4. ICG Module Register Bit Interaction Summary
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
(0)
(0)
—
—
—
—
—
us
us
—
—
0
0
0
0
0
0
DSTG7
TRIM7
(1)
(0)
(0)
—
—
—
—
—
—
Bit 7
1*
1*
0
0
0
0
0
0
R
1
0
(0)
(1)
(1)
(1)
(0)
(0)
us
us
—
—
—
0
0
0
1
0
0
= Unimplemented
DSTG6
TRIM6
R
6
0
0
Register Bit Results for Given Condition
(0)
(1)
uc
us
—
—
—
—
—
—
—
0
0
1
0
1
0
DSTG5
TRIM5
(0)
(1)
(1)
(1)
—
—
—
—
—
—
—
R
5
0
0
1
1
1
1
1
1
(0)
—
—
—
—
—
—
—
—
—
—
0*
0*
0
0
0
0
DSTG4
TRIM4
Unaffected by reset
R
R
4
0
0
(0)
(1)
(1)
—
—
—
—
—
—
—
—
0
0
1
1
1
1
= Reserved
DSTG3
TRIM3
DDIV3
U
R
3
0
(0)
—
—
—
—
—
—
—
—
—
—
—
0
0
0
0
0
$15
DSTG2
Input/Output (I/O) Registers
TRIM2
DDIV2
uw
uw
uw
uw
—
—
—
—
—
—
—
—
—
—
—
—
U
R
2
0
$80
U = Unaffected
uw
uw
uw
uw
—
—
—
—
—
—
—
—
—
—
—
—
DSTG1
TRIM1
DDIV1
U
R
1
0
uw
uw
uw
uw
uw
uw
uw
uw
—
—
—
—
—
—
—
—
—
DSTG0
TRIM0
DDIV0
Bit 0
U
R
0
uw
uw
uw
uw
uw
uw
uw
uw
—
—
—
—
—
—
—
—
—
97
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