HD64F3642AH Renesas Electronics America, HD64F3642AH Datasheet - Page 101
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HD64F3642AH
Manufacturer Part Number
HD64F3642AH
Description
IC H8 MCU FLASH 16K 64QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet
1.HD64F3644HV.pdf
(551 pages)
Specifications of HD64F3642AH
Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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3.4.2
When a port mode register is rewritten to switch the functions of external interrupt pins, the
following points should be observed.
When an external interrupt pin function is switched by rewriting the port mode register that
controls pins IRQ
switched, even if no valid interrupt is input at the pin. Table 3.5 shows the conditions under which
interrupt request flags are set to 1 in this way.
Table 3.5
Interrupt Request
Flags Set to 1
IRR1
Figure 3.7 shows the procedure for setting a bit in a port mode register and clearing the interrupt
request flag.
When switching a pin function, mask the interrupt before setting the bit in the port mode register.
After accessing the port mode register, execute at least one instruction (e.g., NOP), then clear the
interrupt request flag from 1 to 0. If the instruction to clear the flag is executed immediately after
the port mode register access without executing an intervening instruction, the flag will not be
cleared.
An alternative method is to avoid the setting of interrupt request flags when pin functions are
switched by keeping the pins at the high level so that the conditions in table 3.5 do not occur.
Notes on Rewriting Port Mode Registers
IRRI3
IRRI2
IRRI1
Conditions under which Interrupt Request Flag Is Set to 1
3
to IRQ
Conditions
When PMR1 bit IRQ3 is changed from 0 to 1 while pin IRQ
IEGR bit IEG3 = 0.
When PMR1 bit IRQ3 is changed from 1 to 0 while pin IRQ
IEGR bit IEG3 = 1.
When PMR1 bit IRQ2 is changed from 0 to 1 while pin IRQ
IEGR bit IEG2 = 0.
When PMR1 bit IRQ2 is changed from 1 to 0 while pin IRQ
IEGR bit IEG2 = 1.
When PMR1 bit IRQ1 is changed from 0 to 1 while pin IRQ
IEGR bit IEG1 = 0.
When PMR1 bit IRQ1 is changed from 1 to 0 while pin IRQ
IEGR bit IEG1 = 1.
1
, the interrupt request flag may be set to 1 at the time the pin function is
Rev. 6.00 Sep 12, 2006 page 79 of 526
Section 3 Exception Handling
REJ09B0326-0600
3
3
2
2
1
1
is low and
is low and
is low and
is low and
is low and
is low and
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