M30281F8HP#D5 Renesas Electronics America, M30281F8HP#D5 Datasheet - Page 168

• Manufacturer Part Number: M30281F8HP#D5
• Description: IC M16C MCU FLASH 64K 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30281F8HP#D5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M
R
R
13.1 Base Timer
1
e
E
Table 13.2 Base Timer Specifications
. v
6
J
Count source(f
Counting operation
Count start condition
Count stop condition
Base timer reset condition
Value for base timer reset
Interrupt request
Read from timer
Write to timer
Selectable function
The base timer is a free-running counter that counts an internally generated count source.
Table 13.2 lists specifications of the base timer. Table 13.3 shows registers associated with the base timer.
Figure 13.11 shows a block diagram of the base timer. Figure 13.12 shows an example of the base timer
in counter increment mode. Figure 13.13 shows an example of the base timer in counter increment/decre-
ment mode. Figure 13.14 shows an example of two-phase pulse signal processing mode.
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C
2
9
2 /
0 .
B
8
0
0
0
G
4
J
7
a
o r
0 -
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u
2
p
3
0
, 1
0
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BT1
Item
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2
1
0
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0
6
7
C
2 /
page 146
, 8
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1
6
C
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8
3
) B
f
The base timer increments the counter value
The base timer increments/decrements the counter value
Two-phase pulse signal processing
The BTS bit in the G1BCR1 register is set to "1" (base timer starts counting)
The BTS bit in the G1BCR1 register is set to "0" (base timer reset)
(1) The value of the base timer matches the value of the G1BTRR register
(2) The value of the base timer matches the value of G1PO0 register.
(3) Apply a low-level signal ("L") to external interrupt pin,INT1 pin
"0000
The base timer interrupt request is generated:
(1) When the bit 14 or bit 15 in the base timer overflows
(2) The value of the base timer value matches the value of the base timer
reset register (See Figure 13.11)
• The G1BT register indicates a counter value while the base timer is running
• The G1BT register is indeterminate when the base timer is reset
When a value is written while the base timer is running, the timer counter
immediately starts counting from this value. No value can be written while
the base timer is reset.
• Counter increment/decrement mode
"FFFF
timer increments the counter value again when the timer counter reaches
"0000
• Two-phase pulse processing mode
13.14)
8
1
5
The base timer starts counting from "0000
Two-phase pulse signals from P8
or f
n: determined by the DIV7 to DIV0 bits in the G1DV register. n=0 to 255
However, no division when n=0
2
16
16
16
divided by
"
". (See Figure 13.13)
", the timer counter is then decremented back to "0000
P8
P8
1
0
(n+1)
The timer increments
a counter on all edges
,
two-phase pulse input divided by
Specification
0
and P8
The timer decrements
a counter on all edges
16
1
". After incrementing to
pins are counted (See Figure
________
(n+1)
16
". The base
13. Timer S