M30281F8HP#D5 Renesas Electronics America, M30281F8HP#D5 Datasheet - Page 382

IC M16C MCU FLASH 64K 64-LQFP

M30281F8HP#D5

Manufacturer Part Number
M30281F8HP#D5
Description
IC M16C MCU FLASH 64K 64-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet

Specifications of M30281F8HP#D5

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
55
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
For Use With
M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M
R
R
20.6 Timer
e
E
1
. v
J
6
0
20.6.1 Timer A
C
2
9
2 /
0 .
B
20.6.1.1 Timer A (Timer Mode)
20.6.1.2 Timer A (Event Counter Mode)
0
0
8
0
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TAiMR
2. While counting is in progress, the counter value can be read out at any time by reading the TAi
3. If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to “1”
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TAiMR
2. While counting is in progress, the counter value can be read out at any time by reading the TAi
3. If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to “1”
G
4
J
7
a
o r
(i = 0 to 4) register and the TAi register before setting the TAiS bit in the TABSR register to “1” (count
starts).
Always make sure the TAiMR register is modified while the TAiS bit remains “0” (count stops)
regardless whether after reset or not.
register. However, if the TAi register is read at the same time the counter is reloaded, the read value
is always “FFFF
counting, the read value is the one that has been set in the register.
(three-phase output forcible cutoff by input on SD pin enabled), the TA1
pins go to a high-impedance state.
(i = 0 to 4) register, the TAi register, the UDF register, the ONSF register TAZIE, TA0TGL and
TA0TGH bits and the TRGSR register before setting the TAiS bit in the TABSR register to “1” (count
starts).
Always make sure the TAiMR register, the UDF register, the ONSF register TAZIE, TA0TGL and
TA0TGH bits and the TRGSR register are modified while the TAiS bit remains “0” (count stops)
regardless whether after reset or not.
register. However, if the TAi register is read at the same time the counter is reloaded, the read value
is always “FFFF
flows. If the TAi register is read after setting a value in it, but before the counter starts counting, the
read value is the one that has been set in the register.
(three-phase output forcible cutoff by input on SD pin enabled), the TA1
pins go to a high-impedance state.
0 -
. n
u
2
3
p
0
, 1
0
(
M
2
0
1
0
6
7
C
2 /
page 360
, 8
16
M
16
1
”. If the TAi register is read after setting a value in it, but before the counter starts
” when the timer counter underflows and “0000
6
C
2 /
f o
8
3
) B
8
5
_____
_____
_____
_____
16
” when the timer counter over-
OUT
OUT
, TA2
, TA2
OUT
OUT
20. Precautions
and TA4
and TA4
OUT
OUT

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