M30281F8HP#D5 Renesas Electronics America, M30281F8HP#D5 Datasheet - Page 320

• Manufacturer Part Number: M30281F8HP#D5
• Description: IC M16C MCU FLASH 64K 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30281F8HP#D5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M
R
R
18.2 Memory Map
1
e
E
Figure 18.1 Flash Memory Block Diagram (ROM capacity 48K byte)
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6
J
The flash memory contains the user ROM area and the boot ROM area (reserved area). Figures 18.1 to
18.4 show a block diagram of the flash memory. The user ROM area has space to store the microcomputer
operation program in single-chip mode and two 2-Kbyte spaces: the block A and B.
The user ROM area is divided into several blocks. The user ROM area can be rewritten in CPU rewrite,
standard serial input/output, and parallel input/output modes.
However, to rewrite program in block 0 and 1 in CPU rewrite mode, set the FMR02 bit in the FMR0 register
to “1” (block 0, 1 rewrite enabled) and the FMR16 bit in the FMR1 register to “1”(blocks 0 to 4 rewrite
enabled).
Also, to rewrite program in blocks 2 to 4 in CPU rewrite mode, set the FMR16 bit in the FMR1 register to “1”
(blocks 0 to 4 rewrite enabled). When the PM10 bit in the PM1 register is set to “1”(data space access
enabled), block A and B can be available for use.
The boot ROM area (4-byte) is a reserved area. This boot ROM area has a standard serial I/O mode control
program stored before shipping. Do not rewrite the boot ROM area.
0
C
2
9
2 /
0 .
B
8
0
0
0
G
0F4000
0F7FFF
0F8000
0FBFFF
0FC000
0FDFFF
0FE000
0FFFFF
00F000
00F7FF
00F800
00FFFF
4
J
7
a
o r
0 -
. n
u
2
p
3
0
16
16
16
16
16
16
16
16
16
16
16
, 1
16
0
(
M
2
0
1
0
6
7
C
Block 2 : 16K bytes
Block 3 : 16K bytes
Block 1 : 8K bytes
Block 0 : 8K bytes
Block B :2K bytes
Block A :2K bytes
User ROM area
2 /
(Program space)
page 298
, 8
(Data space)
M
1
6
C
2 /
f o
8
(2)
(2)
(3)
(3)
(5)
3
(5)
) B
8
5
NOTES:
1. To specify a block, use the maximum even address in the block.
2. Blocks A and B are enabled for use when the PM10 bit in the PM1
3. Blocks 0 and 1 are enabled for programs and erasure when the
4. The Boot ROM area is reserved. Do not rewrite.
5. Blocks 2 and 3 are enabled for programs and erasure when the
register is set to "1".
FMR02 bit in the FMR0 register is set to "1" and the FMR16 bit in
the FMR1 register is set to "1". (CPU rewrite mode only)
FMR16 bit in the FMR1 register is set to "1". (CPU rewrite mode
only)
0FF000
0FFFFF
16
16
Boot ROM area
4K bytes
(4)
18. Flash Memory Version