DF36034GHJ Renesas Electronics America, DF36034GHJ Datasheet - Page 25
![MCU 3/5V 32K J-TEMP POR&LVD 64-Q](/photos/28/61/286103/64-bqfp__prqp0064gb-a_sml.jpg)
DF36034GHJ
Manufacturer Part Number
DF36034GHJ
Description
MCU 3/5V 32K J-TEMP POR&LVD 64-Q
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.DF36057GFZV.pdf
(594 pages)
Specifications of DF36034GHJ
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F36034GHJ
HD64F36034GHJ
HD64F36034GHJ
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Section 12 Timer Z
Figure 12.1 Timer Z Block Diagram .......................................................................................... 165
Figure 12.2 Timer Z (Channel 0) Block Diagram ...................................................................... 166
Figure 12.3 Timer Z (Channel 1) Block Diagram ...................................................................... 167
Figure 12.4 Example of Outputs in Reset Synchronous PWM Mode and Complementary
Figure 12.5 Accessing Operation of 16-Bit Register (between CPU and TCNT (16 Bits)) ....... 186
Figure 12.6 Accessing Operation of 8-Bit Register (between CPU and TSTR (8 Bits))............ 186
Figure 12.7 Example of Counter Operation Setting Procedure .................................................. 187
Figure 12.8 Free-Running Counter Operation ............................................................................ 188
Figure 12.9 Periodic Counter Operation..................................................................................... 189
Figure 12.10 Count Timing at Internal Clock Operation............................................................ 189
Figure 12.11 Count Timing at External Clock Operation (Both Edges Detected)...................... 190
Figure 12.12 Example of Setting Procedure for Waveform Output by Compare Match............ 191
Figure 12.13 Example of 0 Output/1 Output Operation ............................................................. 192
Figure 12.14 Example of Toggle Output Operation ................................................................... 193
Figure 12.15 Output Compare Timing........................................................................................ 194
Figure 12.16 Example of Input Capture Operation Setting Procedure ....................................... 195
Figure 12.17 Example of Input Capture Operation..................................................................... 196
Figure 12.18 Input Capture Signal Timing ................................................................................. 197
Figure 12.19 Example of Synchronous Operation Setting Procedure ........................................ 198
Figure 12.20 Example of Synchronous Operation...................................................................... 199
Figure 12.21 Example of PWM Mode Setting Procedure .......................................................... 201
Figure 12.22 Example of PWM Mode Operation (1) ................................................................. 202
Figure 12.23 Example of PWM Mode Operation (2) ................................................................. 203
Figure 12.24 Example of PWM Mode Operation (3) ................................................................. 204
Figure 12.25 Example of PWM Mode Operation (4) ................................................................. 205
Figure 12.26 Example of Reset Synchronous PWM Mode Setting Procedure........................... 207
Figure 12.27 Example of Reset Synchronous PWM Mode Operation (OLS0 = OLS1 = 1) ...... 208
Figure 12.28 Example of Reset Synchronous PWM Mode Operation (OLS0 = OLS1 = 0) ...... 209
Figure 12.29 Example of Complementary PWM Mode Setting Procedure................................ 212
Figure 12.30 Canceling Procedure of Complementary PWM Mode .......................................... 213
Figure 12.31 Example of Complementary PWM Mode Operation (1)....................................... 214
Figure 12.32 (1) Example of Complementary PWM Mode Operation
Figure 12.32 (2) Example of Complementary PWM Mode Operation
Figure 12.33 Timing of Overshooting ........................................................................................ 218
Figure 12.34 Timing of Undershooting ...................................................................................... 218
Figure 12.35 Compare Match Buffer Operation......................................................................... 221
PWM Mode ............................................................................................................. 174
(TPSC2 = TPSC1 = TPSC0 = 0) (2)................................................................ 216
(Other than TPSC2 = TPSC1 = TPSC0) (3) .................................................... 217
Rev. 4.00 Mar. 15, 2006 Page xxiii of xxxii
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