DF36034GHJ Renesas Electronics America, DF36034GHJ Datasheet - Page 387
![MCU 3/5V 32K J-TEMP POR&LVD 64-Q](/photos/28/61/286103/64-bqfp__prqp0064gb-a_sml.jpg)
DF36034GHJ
Manufacturer Part Number
DF36034GHJ
Description
MCU 3/5V 32K J-TEMP POR&LVD 64-Q
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.DF36057GFZV.pdf
(594 pages)
Specifications of DF36034GHJ
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F36034GHJ
HD64F36034GHJ
HD64F36034GHJ
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16.3.2
SSCRL is a register that controls module standby, mode, and software reset and selects open-drain
output of the SSCK and SCS pins.
Bit
7
6
5
4
Bit Name
MSTSSU
SSUMS
SRES
SCKOS
SS Control Register L (SSCRL)
0
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
SSU Module Standby
When this bit is 1, the SSU enters the module standby
state. In the module standby state, the SSU internal
registers other than SSCRL cannot be written to.
SSU Mode Select
Selects which combination of the serial data input pin and
serial data output pin is used.
For details, refer to section 16.4.3, Relationship between
Data Input/Output Pin and Shift Register.
0: Clocked synchronous communication mode
1: Four-line bus communication mode
Software reset
When this bit is set to 1, the SSU internal sequencer is
forcibly reset. Then this bit is automatically cleared. The
register value in the SSU is retained.
SSCK Pin Open-Drain Output Select
Selects whether the SSCK pin functions as CMOS output
or NMOS open-drain output.
0: CMOS output
1: NMOS open-drain output
Data input: SSI pin, Data output: SSO pin
When MSS = 1 and BIDE = 0 in SSCRH:
Data input: SSI pin, Data output: SSO pin
When MSS = 0 and BIDE = 0 in SSCRH:
Data input: SSO pin, Data output: SSI pin
When BIDE = 1 in SSCRH:
Data input and output: SSO pin
Section 16 Synchronous Serial Communication Unit (SSU)
Rev. 4.00 Mar. 15, 2006 Page 353 of 556
REJ09B0026-0400
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