R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 23

• Manufacturer Part Number: R5F61663RN50FPV
• Description: MCU FLASH 384K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61663RN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 15 Programmable Pulse Generator (PPG) ............................................775
15.1
15.2
15.3
15.4
15.5
Section 16 8-Bit Timers (TMR).........................................................................811
16.1
16.2
16.3
14.10.6 Conflict between TGR Write and Compare Match........................................... 769
14.10.7 Conflict between Buffer Register Write and Compare Match .......................... 770
14.10.8 Conflict between TGR Read and Input Capture ............................................... 770
14.10.9 Conflict between TGR Write and Input Capture .............................................. 771
14.10.10 Conflict between Buffer Register Write and Input Capture.............................. 772
14.10.11 Conflict between Overflow/Underflow and Counter Clearing ......................... 773
14.10.12 Conflict between TCNT Write and Overflow/Underflow ................................ 773
14.10.13 Multiplexing of I/O Pins ................................................................................... 774
14.10.14 PPG1 Setting when TPU1 Pin is Used.............................................................. 774
14.10.15 Interrupts in the Module Stop State .................................................................. 774
Features............................................................................................................................. 775
Input/Output Pins.............................................................................................................. 778
Register Descriptions........................................................................................................ 780
15.3.1
15.3.2
15.3.3
15.3.4
15.3.5
Operation .......................................................................................................................... 797
15.4.1
15.4.2
15.4.3
15.4.4
15.4.5
15.4.6
Complementary Non-Overlapping Pulse Output)............................................................. 805
15.4.7
15.4.8
Usage Notes ...................................................................................................................... 809
15.5.1
15.5.2
15.5.3
Features............................................................................................................................. 811
Input/Output Pins.............................................................................................................. 816
Register Descriptions........................................................................................................ 817
16.3.1
Next Data Enable Registers H, L (NDERH, NDERL) ..................................... 781
Output Data Registers H, L (PODRH, PODRL)............................................... 784
Next Data Registers H, L (NDRH, NDRL) ...................................................... 786
PPG Output Control Register (PCR) ................................................................ 791
PPG Output Mode Register (PMR) .................................................................. 793
Output Timing................................................................................................... 797
Sample Setup Procedure for Normal Pulse Output........................................... 798
Example of Normal Pulse Output (Example of 5-Phase Pulse Output)............ 800
Non-Overlapping Pulse Output......................................................................... 801
Sample Setup Procedure for Non-Overlapping Pulse Output ........................... 803
Example of Non-Overlapping Pulse Output (Example of 4-Phase
Inverted Pulse Output ....................................................................................... 807
Pulse Output Triggered by Input Capture ......................................................... 808
Module Stop State Function.............................................................................. 809
Operation of Pulse Output Pins......................................................................... 809
TPU Setting when PPG1 is in Use.................................................................... 809
Timer Counter (TCNT)..................................................................................... 819
Rev. 2.00 Sep. 24, 2008 Page xxi of xxxii