R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 877
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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16.8.7
If 16-bit counter mode and compare match count mode are specified at the same time, input clocks
for TCNT_0 and TCNT_1 are not generated, and the counter stops. Do not specify 16-bit counter
mode and compare match count mode simultaneously.
16.8.8
Operation of the TMR can be disabled or enabled using the module stop control register. The
initial setting is for operation of the TMR to be halted. Register access is enabled by clearing the
module stop state. For details, see section 28, Power-Down Modes.
16.8.9
If the module stop state is entered when an interrupt has been requested, it will not be possible to
clear the CPU interrupt source or the DTC activation source. Interrupts should therefore be
disabled before entering the module stop state.
Mode Setting with Cascaded Connection
Module Stop State Setting
Interrupts in Module Stop State
Rev. 2.00 Sep. 24, 2008 Page 843 of 1468
Section 16 8-Bit Timers (TMR)
REJ09B0412-0200
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