MC908AZ60AVFUE Freescale Semiconductor, MC908AZ60AVFUE Datasheet - Page 292

• Manufacturer Part Number: MC908AZ60AVFUE
• Description: IC MCU 61K FLASH 8.4MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60AVFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-QFP
• Processor Series: HC08AZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.4 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE, ZK-HC08AX-A, M68EM08AS/AZ60AE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 15 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MSCAN Controller (MSCAN08)
TERRIF — Transmitter Error Passive Interrupt Flag
BOFFIF — Bus-Off Interrupt Flag
OVRIF — Overrun Interrupt Flag
RXF — Receive Buffer Full
1. Condition to set the flag: TERRIF = (128 ≤ TEC ≤ 255) & BOFFIF
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This flag is set when the MSCAN08 goes into error passive status due to the Transmit Error counter
exceeding 127 and the Bus-off interrupt flag is not set
while this flag is set.
This flag is set when the MSCAN08 goes into bus-off status, due to the transmit error counter
exceeding 255. It cannot be cleared before the MSCAN08 has monitored 128 times 11 consecutive
‘recessive’ bits on the bus. If not masked, an Error interrupt is pending while this flag is set.
This flag is set when a data overrun condition occurs. If not masked, an error interrupt is pending while
this flag is set.
The RXF flag is set by the MSCAN08 when a new message is available in the foreground receive
buffer. This flag indicates whether the buffer is loaded with a correctly received message. After the
CPU has read that message from the receive buffer the RXF flag must be cleared to release the buffer.
A set RXF flag prohibits the exchange of the background receive buffer into the foreground buffer. If
not masked, a receive interrupt is pending while this flag is set.
1 = MSCAN08 went into transmit error passive status.
0 = No transmit error passive status has been reached.
1 = MSCAN08has gone into bus-off status.
0 = No bus-off status has bee reached.
1 = A data overrun has been detected since last clearing the flag.
0 = No data overrun has occurred.
1 = The receive buffer is full. A new message is available.
0 = The receive buffer is released (not full).
To ensure data integrity, no registers of the receive buffer shall be read
while the RXF flag is cleared.
The CRFLG register is held in the reset state when the SFTRES bit in
CMCR0 is set.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
NOTE
NOTE
(1)
. If not masked, an Error interrupt is pending
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