D64F3437TFLH16V Renesas Electronics America, D64F3437TFLH16V Datasheet - Page 338
D64F3437TFLH16V
Manufacturer Part Number
D64F3437TFLH16V
Description
MCU 5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet
1.HD64F3437STF16V.pdf
(755 pages)
Specifications of D64F3437TFLH16V
Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D64F3437TFLH16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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13.3.7
The logic levels at the SCL and SDA pins are routed through noise cancelers before being latched
internally. Figure 13.11 shows a block diagram of the noise canceler.
The noise canceler consists of two cascaded latches and a match detector. The SCL (or SDA)
input signal is sampled on the system clock, but is not passed forward to the next circuit unless the
outputs of both latches agree. If they do not agree, the previous value is held.
306
SCL or
SDA input
signal
Sampling
clock
t: System clock
Noise Canceler
D
Sampling clock
Latch
C
Figure 13.11 Block Diagram of Noise Canceler
t
Q
D
Latch
C
Q
detector
Match
Internal
SCL or
SDA
signal
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