D64F3437TFLH16V Renesas Electronics America, D64F3437TFLH16V Datasheet - Page 543
D64F3437TFLH16V
Manufacturer Part Number
D64F3437TFLH16V
Description
MCU 5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet
1.HD64F3437STF16V.pdf
(755 pages)
Specifications of D64F3437TFLH16V
Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
D64F3437TFLH16V
Manufacturer:
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Bit 1—Erase Setup (ESU): Prepares for a transition to erase mode. Set this bit to 1 before setting
the E bit in FLMCR1. (Do not set the SWE, PSU, EV, PV, E, or P bit at the same time.)
Bit 1: ESU
0
1
Bit 0—Program Setup (PSU): Prepares for a transition to program mode. Set this bit to 1 before
setting the P bit in FLMCR1. (Do not set the SWE, ESU, EV, PV, E, or P bit at the same time.)
Bit 0: PSU
0
1
21.2.3
Note: The FLSHE bit in WSCR must be set to 1 in order for this register to be accessed.
EBR2 is an 8-bit register that designates flash-memory erase blocks for erasure. EBR2 is
initialized to H'00 by a reset, in hardware standby mode and software standby mode, and when the
SWE bit in FLMCR1 is not set. When a bit in EBR2 is set to 1, the corresponding block can be
erased. Other blocks are erase-protected. Only one bit should be set in EBR2; do not set two or
more bits. When on-chip flash memory is disabled, a read will return H'00, and writes are invalid.
The flash memory block configuration is shown in table 21.5.
Bit
Initial value
Read/Write
* Writes to bit 7 are invalid in mode 2.
Erase Block Register 2 (EBR2)
R/W*
EB7
Description
Erase setup cleared
Erase setup
[Setting condition]
When SWE = 1
Description
Program setup cleared
Program setup
[Setting condition]
When SWE = 1
7
0
EB6
R/W
6
0
EB5
R/W
5
0
EB4
R/W
4
0
EB3
R/W
3
1
EB2
R/W
2
0
EB1
R/W
1
0
(Initial value)
(Initial value)
EB0
R/W
0
0
511
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