UPD78F0513AGA-GAM-AX Renesas Electronics America, UPD78F0513AGA-GAM-AX Datasheet - Page 113

• Manufacturer Part Number: UPD78F0513AGA-GAM-AX
• Description: MCU 8BIT 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AGA-GAM-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
(2) CALLT instruction table area
(3) Option byte area
(4) CALLF instruction entry area
(5) On-chip debug security ID setting area (
3.1.2 Memory bank (products whose flash memory is at least 96 KB only)
and assigned to memory banks 0 to 5 in the
BANK SELECT FUNCTION (PRODUCTS WHOSE FLASH MEMORY IS AT LEAST 96 KB ONLY).
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
The 16 KB area 8000H to BFFFH is assigned to memory banks 0 to 3 in the
The banks are selected by using a memory bank select register (BANK). For details, see CHAPTER 4 MEMORY
Cautions 1. Instructions cannot be fetched between different memory banks.
The 64-byte area 0040H to 007FH can store the subroutine entry address of a 1-byte call instruction (CALLT).
A 5-byte area of 0080H to 0084H and 1080H to 1084H can be used as an option byte area. Set the option byte at
0080H to 0084H when the boot swap is not used, and at 0080H to 0084H and 1080H to 1084H when the boot swap is
used. For details, see CHAPTER 26 OPTION BYTE.
The area 0800H to 0FFFH can perform a direct subroutine call with a 2-byte call instruction (CALLF).
A 10-byte area of 0085H to 008EH and 1085H to 108EH can be used as an on-chip debug security ID setting area.
Set the on-chip debug security ID of 10 bytes at 0085H to 008EH when the boot swap is not used and at 0085H to
008EH and 1085H to 108EH when the boot swap is used. For details, see CHAPTER 28 ON-CHIP DEBUG
FUNCTION (
2. Branch and access cannot be directly executed between different memory banks.
3. Allocate interrupt servicing in the common area.
4. An instruction that extends from 7FFFH to 8000H can only be executed in memory bank 0.
branch or access between different memory banks via the common area.
μ
PD78F05xxD and 78F05xxDA ONLY).
μ
PD78F05x7, 78F05x7A, 78F05x7D and 78F05x7DA (x = 2 to 4).
μ
PD78F05xxD and 78F05xxDA only)
CHAPTER 3 CPU ARCHITECTURE
μ
PD78F05x6 and 78F05x6A (x = 2 to 4),
Execute
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