UPD78F0513AGA-GAM-AX Renesas Electronics America, UPD78F0513AGA-GAM-AX Datasheet - Page 466
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UPD78F0513AGA-GAM-AX
Manufacturer Part Number
UPD78F0513AGA-GAM-AX
Description
MCU 8BIT 48-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0513AGA-GAM-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F0513AGA-GAM-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD78F0513AGA-GAM-AX
Manufacturer:
NEC
Quantity:
20 000
- Current page: 466 of 982
- Download datasheet (7Mb)
78K0/Kx2
(6) Asynchronous serial interface control register 6 (ASICL6)
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Address: FF58H After reset: 16H R/W
ASICL6
Note Bit 7 is read-only.
Symbol
This register controls the serial communication operations of serial interface UART6.
ASICL6 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 16H.
Caution ASICL6 can be refreshed (the same value is written) by software during a communication operation
Figure 15-10. Format of Asynchronous Serial Interface Control Register 6 (ASICL6) (1/2)
(when bits 7 and 6 (POWER6, TXE6) of ASIM6 = 1 or bits 7 and 5 (POWER6, RXE6) of ASIM6 = 1).
However, do not set both SBRT6 and SBTT6 to 1 by a refresh operation during SBF reception
(SBRT6 = 1) or SBF transmission (until INTST6 occurs since SBTT6 has been set (1)), because it
may re-trigger SBF reception or SBF transmission.
SBRF6
SBRT6
SBRF6
SBTT6
<7>
0
1
0
1
0
1
If POWER6 = 0 and RXE6 = 0 or if SBF reception has been completed correctly
SBF reception in progress
SBF reception trigger
SBF transmission trigger
SBRT6
<6>
Note
SBTT6
5
SBL62
4
SBF reception status flag
SBF transmission trigger
SBF reception trigger
SBL61
CHAPTER 15 SERIAL INTERFACE UART6
3
−
−
SBL60
2
DIR6
1
TXDLV6
0
466
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