UPD78F1142AGA-HAB-AX Renesas Electronics America, UPD78F1142AGA-HAB-AX Datasheet - Page 173
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UPD78F1142AGA-HAB-AX
Manufacturer Part Number
UPD78F1142AGA-HAB-AX
Description
MCU 16BIT 78K0R/KX3 64-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1142AGA-HAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1142AGA-HAB-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 173 of 880
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5.6.4 Example of controlling internal low-speed oscillation clock
driven (240 kHz (TYP.)) if the watchdog timer operation is enabled by the option byte.
timer operates, the internal low-speed oscillation clock does not stop even in case of a program loop.
The internal low-speed oscillation clock cannot be used as the CPU clock. Used only as the watchdog timer clock.
The internal low-speed oscillator automatically starts oscillation after a reset release, and the watchdog timer is
The internal low-speed oscillator continues oscillation except when the watchdog timer stops. When the watchdog
(1) Example of setting procedure when stopping the internal low-speed oscillation clock
(2) Example of setting procedure when restarting oscillation of the internal low-speed oscillation clock
The internal low-speed oscillation clock can be stopped in the following two ways.
• Stop the watchdog timer in the HALT/STOP mode by the option byte (bit 0 (WDSTBYON) of 000C0H = 0),
• Stop the watchdog timer by the option byte (bit 4 (WDTON) of 000C0H = 0).
The internal low-speed oscillation clock can be restarted as follows.
• Release the HALT or STOP mode
and execute the HALT or STOP instruction.
(only when the watchdog timer is stopped in the HALT/STOP mode by the option byte (bit 0 (WDSTBYON)
of 000C0H) = 0) and when the watchdog timer is stopped as a result of execution of the HALT or STOP
instruction).
CHAPTER 5 CLOCK GENERATOR
User’s Manual U17854EJ9V0UD
171
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