UPD78F1142AGA-HAB-AX Renesas Electronics America, UPD78F1142AGA-HAB-AX Datasheet - Page 362
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UPD78F1142AGA-HAB-AX
Manufacturer Part Number
UPD78F1142AGA-HAB-AX
Description
MCU 16BIT 78K0R/KX3 64-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1142AGA-HAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1142AGA-HAB-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Address: F0060H
(15) Noise filter enable register 0 (NFEN0)
Symbol
NFEN0
Caution Be sure to clear bits 7, 5 to 3, and 1 to “0”.
NFEN0 is used to set whether the noise filter can be used for the input signal from the serial data input pin to
each channel.
Disable the noise filter of the pin used for CSI or simplified I
bit of this register to 0.
Enable the noise filter of the pin used for UART communication, by setting the corresponding bit of this
register to 1.
When the noise filter is enabled, CPU/peripheral operating clock (f
detection.
NFEN0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Set SNFEN30 to 1 to use the R
Clear SNFEN30 to 0 to use the P14 pin.
Set SNFEN10 to 1 to use the R
Clear SNFEN10 to 0 to use the SDA10, SI10, and P03 pins.
Set SNFEN00 to 1 to use the R
Clear SNFEN00 to 0 to use the SI00 and P11 pins.
SNFEN30
SNFEN10
SNFEN00
0
1
0
1
0
1
7
0
After reset: 00H
Figure 11-18. Format of Noise Filter Enable Register 0 (NFEN0)
Noise filter OFF
Noise filter ON
Noise filter OFF
Noise filter ON
Noise filter OFF
Noise filter ON
SNFEN30
6
R/W
CHAPTER 11 SERIAL ARRAY UNIT
X
X
X
D3 pin.
D1 pin.
D0 pin.
5
0
User’s Manual U17854EJ9V0UD
Use of noise filter of R
Use of noise filter of R
Use of noise filter of R
4
0
2
C communication, by clearing the corresponding
X
3
0
D1/SDA10/SI10/P03 pin
X
D0/SI00/P11 pin
X
CLK
D3/P14 pin
) is synchronized with 2-clock match
SNFEN10
2
1
0
SNFEN00
0
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