UPD78F1142AGA-HAB-AX Renesas Electronics America, UPD78F1142AGA-HAB-AX Datasheet - Page 509
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UPD78F1142AGA-HAB-AX
Manufacturer Part Number
UPD78F1142AGA-HAB-AX
Description
MCU 16BIT 78K0R/KX3 64-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1142AGA-HAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1142AGA-HAB-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 509 of 880
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(Communication reservation)
Note The communication reservation operation executes a write to IIC shift register 0 (IIC0) when a stop
Remark
condition interrupt request occurs.
STT0:
MSTS0: Bit 7 of IIC status register 0 (IICS0)
IIC0:
Bit 1 of IIC control register 0 (IICC0)
IIC shift register 0
Yes
Note
Figure 12-23. Communication Reservation Protocol
Cancel communication
reservation
Define communication
reservation
CHAPTER 12 SERIAL INTERFACE IIC0
MOV IIC0, #××H
MSTS0 = 0?
SET1 STT0
Wait
DI
EI
User’s Manual U17854EJ9V0UD
(Generate start condition)
No
Sets STT0 flag (communication reservation)
Defines that communication reservation is in effect
(defines and sets user flag to any part of RAM)
Secures wait period set by software (see Table 12-7).
Confirmation of communication reservation
Clear user flag
IIC0 write operation
507
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