UPD78F1142AGA-HAB-AX Renesas Electronics America, UPD78F1142AGA-HAB-AX Datasheet - Page 518
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UPD78F1142AGA-HAB-AX
Manufacturer Part Number
UPD78F1142AGA-HAB-AX
Description
MCU 16BIT 78K0R/KX3 64-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1142AGA-HAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1142AGA-HAB-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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516
Remark
The main processing of the slave operation is explained next.
Start serial interface IIC0 and wait until communication is enabled. When communication is enabled, execute
communication by using the communication mode flag and ready flag (processing of the stop condition and
start condition is performed by an interrupt. Here, check the status by using the flags).
The transmission operation is repeated until the master no longer returns ACK. If ACK is not returned from the
master, communication is completed.
For reception, the necessary amount of data is received. When communication is completed, ACK is not
returned as the next data. After that, the master generates a stop condition or restart condition. Exit from the
communication status occurs in this way.
Conform to the specifications of the product that is in communication, regarding the transmission and
reception formats.
No
No
No
ACKE = WTIM = 1, SPIE = 0
Clearing communication
IICC0 ¬ 0XX011XXB
IICC0 ¬ 1XX011XXB
Clearing ready flag
direction flag = 1?
direction flag = 1?
Communication
Ready flag =
Communication
Communication
mode flag = 1?
Communication
Setting IICRSV
IICCL0 ¬ XXH
mode flag = 1?
SVA0 ¬ XXH
IICX0 ¬ 0XH
IICF0 ¬ 0XH
ACKD0 = 1?
Writing IIC0
Setting port
WREL0 = 1
Setting port
mode flag
IICE = 1
START
Yes
Yes
Yes
Yes
Yes
No
Figure 12-26. Slave Operation Flowchart (1)
1?
CHAPTER 12 SERIAL INTERFACE IIC0
No
No
Yes
Sets the port from input mode to output mode and enables the output of the I
(see 12.3 (7) Port mode register 6 (PM6)).
Starts
transmission.
Selects a transfer clock.
Sets a local address.
Sets a start condition.
Sets the port used alternatively as the pin to be used.
First, set the port to input mode and the output latch to 0 (see 12.3 (7) Port mode register 6 (PM6)).
User’s Manual U17854EJ9V0UD
No
Clearing ready flag
direction flag = 0?
Communication
Communication
Ready flag =
mode flag = 1?
Reading IIC0
WREL0 = 1
Yes
Yes
Yes
1?
No
No
Starts
reception.
2
C bus
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