UPD78F1001GA-HAA-AX Renesas Electronics America, UPD78F1001GA-HAA-AX Datasheet - Page 846
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UPD78F1001GA-HAA-AX
Manufacturer Part Number
UPD78F1001GA-HAA-AX
Description
MCU 16BIT 78K0R/KX3-L 44-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GA-HAA-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GA-HAA-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
16.4 Operations of Multiplier/Divider
16.4.1 Multiplication operation
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
• Initial setting
• During operation processing
• Operation end
• Next operation
Operation clock
<1> Set bit 7 (DIVMODE) of the multiplication/division control register (MDUC) to 0.
<2> Set the multiplicand to multiplication/division data register A (L) (MDAL).
<3> Set the multiplier to multiplication/division data register A (H) (MDAH).
<4> Wait for at least one clock. The operation will end when one clock has been issued.
<5> Read the product (lower 16 bits) from multiplication/division data register B (L) (MDBL).
<6> Read the product (higher 16 bits) from multiplication/division data register B (H) (MDBH).
<7> To execute multiplication operation next, start from the “Initial setting” for multiplication operation.
<8> To execute division operation next, start from the “Initial setting” in 16.4.2 Division operation.
Remark
DIVMODE
MDAH
MDBH
MDAL
(There is no preference in the order of executing steps <2> and <3>. Multiplication operation is automatically
started when the multiplier and multiplicand are set to the MDAH and MDAL registers, respectively.)
(There is no preference in the order of executing steps <5> and <6>.)
Steps <1> to <7> correspond to <1> to <7> in Figure 16-6.
"0"
Figure 16-6. Timing Diagram of Multiplication Operation (0003H × 0002H)
<1>
Initial value
Initial value
Initial value
= 0
= 0
= 0
<2>
<3>
<4>
0003H
0002H
0006H
<5>, <6>
CHAPTER 16 MULTIPLIER/DIVIDER
<7>
1FFFEH
FFFFH
FFFFH
FFFE000H
846
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