SAK-XC2267M-104F80L AA Infineon Technologies, SAK-XC2267M-104F80L AA Datasheet - Page 56
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SAK-XC2267M-104F80L AA
Manufacturer Part Number
SAK-XC2267M-104F80L AA
Description
IC MCU 32BIT FLASH 100-LQFP
Manufacturer
Infineon Technologies
Series
XC22xxMr
Datasheet
1.SAK-XC2267M-72F80L_AA.pdf
(128 pages)
Specifications of SAK-XC2267M-104F80L AA
Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
75
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
SP000398034
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- Download datasheet (2Mb)
3.9
The XC226xM types feature several CCU6 units (CCU60, CCU61, CCU62, CCU63).
The CCU6 is a high-resolution capture and compare unit with application-specific
modes. It provides inputs to start the timers synchronously, an important feature in
devices with several CCU6 modules.
The module provides two independent timers (T12, T13), that can be used for PWM
generation, especially for AC motor control. Additionally, special control modes for block
commutation and multi-phase machines are supported.
Timer 12 Features
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Timer 13 Features
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Additional Features
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Data Sheet
Three capture/compare channels, where each channel can be used either as a
capture or as a compare channel.
Supports generation of a three-phase PWM (six outputs, individual signals for high-
side and low-side switches)
16-bit resolution, maximum count frequency = peripheral clock
Dead-time control for each channel to avoid short circuits in the power stage
Concurrent update of the required T12/13 registers
Center-aligned and edge-aligned PWM can be generated
Single-shot mode supported
Many interrupt request sources
Hysteresis-like control mode
Automatic start on a HW event (T12HR, for synchronization purposes)
One independent compare channel with one output
16-bit resolution, maximum count frequency = peripheral clock
Can be synchronized to T12
Interrupt generation at period match and compare match
Single-shot mode supported
Automatic start on a HW event (T13HR, for synchronization purposes)
Block commutation for brushless DC drives implemented
Position detection via Hall sensor pattern
Automatic rotational speed measurement for block commutation
Integrated error handling
Fast emergency stop without CPU load via external signal (CTRAP)
Control modes for multi-channel AC drives
Output levels can be selected and adapted to the power stage
Capture/Compare Units CCU6x
XC2000 Family Derivatives / Base Line
56
XC2268M/67M, XC2265M/64M/63M
Functional Description
V2.0, 2009-03
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