SAK-XC2267M-104F80L AA Infineon Technologies, SAK-XC2267M-104F80L AA Datasheet - Page 65
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SAK-XC2267M-104F80L AA
Manufacturer Part Number
SAK-XC2267M-104F80L AA
Description
IC MCU 32BIT FLASH 100-LQFP
Manufacturer
Infineon Technologies
Series
XC22xxMr
Datasheet
1.SAK-XC2267M-72F80L_AA.pdf
(128 pages)
Specifications of SAK-XC2267M-104F80L AA
Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
75
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
SP000398034
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3.13
The XC226xM features several USIC modules (USIC0, USIC1, USIC2, USIC3), each
providing two serial communication channels.
The Universal Serial Interface Channel (USIC) module is based on a generic data shift
and data storage structure which is identical for all supported serial communication
protocols. Each channel supports complete full-duplex operation with a basic data buffer
structure (one transmit buffer and two receive buffer stages). In addition, the data
handling software can use FIFOs.
The protocol part (generation of shift clock/data/control signals) is independent of the
general part and is handled by protocol-specific preprocessors (PPPs).
The USIC’s input/output lines are connected to pins by a pin routing unit. The inputs and
outputs of each USIC channel can be assigned to different interface pins, providing great
flexibility to the application software. All assignments can be made during runtime.
Figure 10
The regular structure of the USIC module brings the following advantages:
•
•
•
Data Sheet
Higher flexibility through configuration with same look-and-feel for data management
Reduced complexity for low-level drivers serving different protocols
Wide range of protocols with improved performances (baud rate, buffer handling)
Bus
Universal Serial Interface Channel Modules (USIC)
f
sys
General Structure of a USIC Module
Buffer & Shift Structure Protocol Preprocessors
DBU
DBU
0
1
Fractional
Control 0
Control 1
Dividers
DSU
DSU
0
1
XC2000 Family Derivatives / Base Line
65
Generators
Baud rate
XC2268M/67M, XC2265M/64M/63M
PPP_C
PPP_D
PPP_C
PPP_D
PPP_A
PPP_B
PPP_A
PPP_B
Functional Description
USIC_basic.vsd
Pins
V2.0, 2009-03
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