AT90LS4433-4AC Atmel, AT90LS4433-4AC Datasheet - Page 42

IC MCU 4K 4MHZ A/D LV 32TQFP

AT90LS4433-4AC

Manufacturer Part Number
AT90LS4433-4AC
Description
IC MCU 4K 4MHZ A/D LV 32TQFP
Manufacturer
Atmel
Series
AVR® 90LSr
Datasheet

Specifications of AT90LS4433-4AC

Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

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Manufacturer
Quantity
Price
Part Number:
AT90LS4433-4AC
Manufacturer:
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Quantity:
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42
AT90S/LS4433
Table 14. Compare1 Mode Select in PWM Mode
Note that in the PWM mode, the ten least significant OCR1 bits, when written, are trans-
ferred to a temporary location. They are latched when Timer/Counter1 reaches TOP.
This prevents the occurrence of odd-length PWM pulses (glitches) in the event of an
unsynchronized OCR1 write. See Figure 34 for an example.
Figure 34. Effects on Unsynchronized OCR1 Latching
During the time between the write and the latch operation, a read from OCR1 will read
the contents of the temporary location. This means that the most recently written value
always will read out of OCR1.
When OCR1 contains $0000 or TOP, the output OC1 is updated to low or high on the
next compare match according to the settings of COM11 and COM10. This is shown in
Table 15.
Table 15. PWM Outputs OCR = $0000 or TOP
In PWM mode, the Timer Overflow Flag1 (TOV1) is set when the counter changes direc-
tion at $0000. Timer Overflow Interrupt1 operates exactly as in normal Timer/Counter
mode, i.e., it is executed when TOV1 is set, provided that Timer Overflow Interrupt1 and
global interrupts are enabled. This also applies to the Timer Output Compare1 Flag and
interrupt.
COM11
0
0
1
1
COM11
1
1
1
1
COM10
0
1
0
1
Effect on OC1
Not connected
Not connected
Cleared on compare match, up-counting. Set on compare match, down-
counting (non-inverted PWM).
Cleared on compare match, down-counting. Set on compare match, up-
counting (inverted PWM).
COM10
0
0
1
1
OCR1
$0000
$0000
TOP
TOP
Output OC1
H
H
L
L
1042H–AVR–04/03

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