ATMEGA8535-16MI Atmel, ATMEGA8535-16MI Datasheet - Page 130
![IC AVR MCU 8K 16MHZ IND 44-QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA8535-16MI
Manufacturer Part Number
ATMEGA8535-16MI
Description
IC AVR MCU 8K 16MHZ IND 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8535-16MI
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Timer/Counter Register –
TCNT2
130
ATmega8535(L)
Table 54 shows the COM21:0 bit functionality when the WGM21:0 bits are set to phase
correct PWM mode.
Table 54. Compare Output Mode, Phase Correct PWM Mode
Note:
• Bit 2:0 – CS22:0: Clock Select
The three clock select bits select the clock source to be used by the Timer/Counter, see
Table 55.
Table 55. Clock Select Bit Description
The Timer/Counter Register gives direct access, both for read and write operations, to
the Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes)
the Compare Match on the following timer clock. Modifying the counter (TCNT2) while
the counter is running, introduces a risk of missing a Compare Match between TCNT2
and the OCR2 Register.
Bit
Read/Write
Initial Value
COM21
CS22
0
0
1
1
0
0
0
0
1
1
1
1
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the
COM20
Compare Match is ignored, but the set or clear is done at TOP. See “Phase Correct
PWM Mode” on page 125 for more details.
CS21
0
1
0
1
R/W
0
0
1
1
0
0
1
1
7
0
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on Compare Match when up-counting. Set OC2 on Compare
Match when down-counting.
Set OC2 on Compare Match when up-counting. Clear OC2 on Compare
Match when down-counting.
R/W
6
0
CS20
0
1
0
1
0
1
0
1
R/W
5
0
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
clk
clk
T
T
T2S
T2S
T2S
T2S
T2S
2
2
S
S
/256 (From prescaler)
/1024 (From prescaler)
R/W
/(No prescaling)
/8 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
4
0
TCNT2[7:0]
R/W
3
0
R/W
2
0
(1)
R/W
1
0
R/W
0
0
2502K–AVR–10/06
TCNT2
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