ATMEGA8535-16MI Atmel, ATMEGA8535-16MI Datasheet - Page 40
ATMEGA8535-16MI
Manufacturer Part Number
ATMEGA8535-16MI
Description
IC AVR MCU 8K 16MHZ IND 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8535-16MI
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 40 of 321
- Download datasheet (3Mb)
Watchdog Reset
MCU Control and Status
Register – MCUCSR
40
ATmega8535(L)
When the Watchdog times out, it will generate a short reset pulse of one CK cycle dura-
tion. On the falling edge of this pulse, the delay timer starts counting the Time-out period
t
Figure 20. Watchdog Reset During Operation
The MCU Control and Status Register provides information on which reset source
caused an MCU Reset.
• Bit 3 – WDRF: Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by
writing a logic zero to the flag.
• Bit 2 – BORF: Brown-out Reset Flag
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by
writing a logic zero to the flag.
• Bit 1 – EXTRF: External Reset Flag
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by
writing a logic zero to the flag.
• Bit 0 – PORF: Power-on Reset Flag
This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to
the flag.
To make use of the Reset Flags to identify a reset condition, the user should read and
then reset the MCUCSR as early as possible in the program. If the register is cleared
before another reset occurs, the source of the reset can be found by examining the
Reset Flags.
TOUT
Bit
Read/Write
Initial Value
. Refer to page 41 for details on operation of the Watchdog Timer.
CC
R/W
7
–
0
ISC2
R/W
6
0
R
5
–
0
CK
R/W
4
–
WDRF
R/W
3
See Bit Description
BORF
R/W
2
EXTRF
R/W
1
PORF
R/W
0
2502K–AVR–10/06
MCUCSR
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