AT89C5131-S3SIL Atmel, AT89C5131-S3SIL Datasheet - Page 110
AT89C5131-S3SIL
Manufacturer Part Number
AT89C5131-S3SIL
Description
IC 8051 MCU FLASH 32K USB 52PLCC
Manufacturer
Atmel
Series
AT89C513xr
Datasheet
1.AT89C5131-S3SIL.pdf
(176 pages)
Specifications of AT89C5131-S3SIL
Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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Table 82. Status for Slave Transmitter Mode
110
(SSCS)
Status
code
A8h
B0h
B8h
C0h
C8h
Status of the TWI bus
and TWI hardware
Own SLA+R has been
received; ACK has been
returned
Arbitration lost in
SLA+R/W as master; own
SLA+R has been
received; ACK has been
returned
Data byte in SSDAT has
been transmitted; NOT
ACK has been received
Data byte in SSDAT has
been transmitted; NOT
ACK has been received
Last data byte in SSDAT
has been transmitted
(AA=0); ACK has been
received
AT89C5131
No SSDAT
No SSDAT
No SSDAT
No SSDAT
No SSDAT
No SSDAT
No SSDAT
No SSDAT
Load data
Load data
Load data
Load data
Load data
Load data
To/from
action or
action or
action or
action or
action or
action or
SSDAT
byte or
byte or
byte or
action
action
byte
byte
byte
Application Software Response
STA
X
X
X
X
X
X
0
0
1
1
0
0
1
1
STO
To SSCON
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SI
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Next Action Taken by TWI Software
Last data byte will be transmitted and NOT ACK will
be received
Data byte will be transmitted and ACK will be received
Last data byte will be transmitted and NOT ACK will
be received
Data byte will be transmitted and ACK will be received
Last data byte will be transmitted and NOT ACK will
be received
Data byte will be transmitted and ACK will be received
Switched to the not addressed slave mode; no
recognition of own SLA or GCA
Switched to the not addressed slave mode; own SLA
will be recognised; GCA will be recognised if GC=logic
1
Switched to the not addressed slave mode; no
recognition of own SLA or GCA. A START condition
will be transmitted when the bus becomes free
Switched to the not addressed slave mode; own SLA
will be recognised; GCA will be recognised if GC=logic
1. A START condition will be transmitted when the bus
becomes free
Switched to the not addressed slave mode; no
recognition of own SLA or GCA
Switched to the not addressed slave mode; own SLA
will be recognised; GCA will be recognised if GC=logic
1
Switched to the not addressed slave mode; no
recognition of own SLA or GCA. A START condition
will be transmitted when the bus becomes free
Switched to the not addressed slave mode; own SLA
will be recognised; GCA will be recognised if GC=logic
1. A START condition will be transmitted when the bus
becomes free
4136B–USB–09/03
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