AT89C5131-S3SIL Atmel, AT89C5131-S3SIL Datasheet - Page 30
AT89C5131-S3SIL
Manufacturer Part Number
AT89C5131-S3SIL
Description
IC 8051 MCU FLASH 32K USB 52PLCC
Manufacturer
Atmel
Series
AT89C513xr
Datasheet
1.AT89C5131-S3SIL.pdf
(176 pages)
Specifications of AT89C5131-S3SIL
Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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Loading the Column Latches
Programming the Flash Spaces
User
30
AT89C5131
Any number of data from 1 byte to 128 bytes can be loaded in the column latches. This
provides the capability to program the whole memory by byte, by page or by any number
of bytes in a page.
When programming is launched, an automatic erase of the locations loaded in the col-
umn latches is first performed, then programming is effectively done. Thus, no page or
block erase is needed and only the loaded data are programmed in the corresponding
page.
The following procedure is used to load the column latches and is summarized in
Figure 15:
•
•
•
•
•
Figure 15. Column Latches Loading Procedure
The following procedure is used to program the User space and is summarized in
Figure 16:
•
•
•
•
Note:
Map the column latch space by setting FPS bit.
Load the DPTR with the address to load.
Load Accumulator register with the data to load.
Execute the MOVX @DPTR, A instruction.
If needed loop the three last instructions until the page is completely loaded.
Load data in the column latches from address 0000h to 7FFFh
Disable the interrupts.
Launch the programming by writing the data sequence 50h followed by A0h in
FCON register.
The end of the programming indicated by the FBUSY flag cleared.
Enable the interrupts.
1. The last page address used when loading the column latch is the one used to select
the page programming address.
Column Latches Mapping
Exec: MOVX @DPTR, A
Data memory Mapping
Column Latches
DPTR = Address
ACC = Data
Data Load
Last Byte
Loading
to load?
FPS = 1
FPS = 0
(1)
.
4136B–USB–09/03
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