AT89C5131-S3SIL Atmel, AT89C5131-S3SIL Datasheet - Page 24
AT89C5131-S3SIL
Manufacturer Part Number
AT89C5131-S3SIL
Description
IC 8051 MCU FLASH 32K USB 52PLCC
Manufacturer
Atmel
Series
AT89C513xr
Datasheet
1.AT89C5131-S3SIL.pdf
(176 pages)
Specifications of AT89C5131-S3SIL
Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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Dual Data Pointer
Register
Figure 10. Use of Dual Pointer
24
AT89C5131
7
AUXR1(A2H)
DPS
0
The additional data pointer can be used to speed up code execution and reduce code
size.
The dual DPTR structure is a way by which the chip will specify the address of an exter-
nal data memory location. There are two 16-bit DPTR registers that address the external
memory, and a single bit called DPS = AUXR1.0 (see Table 32) that allows the program
code to switch between them (see Figure 10).
Table 32. AUXR1 Register
AUXR1- Auxiliary Register 1(0A2h)
Reset Value = XXXX XX0X0b
Not bit addressable
a. Bit 2 stuck at 0; this allows to use INC AUXR1 to toggle DPS without changing GF3.
Number
Bit
7
6
5
4
3
2
1
0
7
-
Mnemonic
DPH(83H) DPL(82H)
ENBOOT
DPS
GF3
Bit
0
-
-
-
-
6
-
DPTR1
Description
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enable Boot Flash
Cleared to disable boot ROM.
Set to map the boot ROM between F800h - 0FFFFh.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
This bit is a general-purpose user flag.
Always cleared.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
Cleared to select DPTR0.
Set to select DPTR1.
ENBOOT
DPTR0
5
4
-
GF3
3
External Data Memory
2
0
1
-
4136B–USB–09/03
DPS
0
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