ATMEGA165-16MI Atmel, ATMEGA165-16MI Datasheet - Page 132
ATMEGA165-16MI
Manufacturer Part Number
ATMEGA165-16MI
Description
IC AVR MCU 16K 16MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA165-16MI
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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2573G–AVR–07/09
•Bit 5:4 – COM2A1:0: Compare Match Output Mode A
These bits control the Output Compare pin (OC2A) behavior. If one or both of the
COM2A1:0 bits are set, the OC2A output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit cor-
responding to OC2A pin must be set in order to enable the output driver.
When OC2A is connected to the pin, the function of the COM2A1:0 bits depends on the
WGM21:0 bit setting. Table 55 shows the COM2A1:0 bit functionality when the
WGM21:0 bits are set to a normal or CTC mode (non-PWM).
Table 55. Compare Output Mode, non-PWM Mode
Table 56 shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast
PWM mode.
Table 56. Compare Output Mode, Fast PWM Mode
Note:
Table 57 shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to
phase correct PWM mode.
Table 57. Compare Output Mode, Phase Correct PWM Mode
Note:
• Bit 2:0 – CS22:0: Clock Select
COM2A1
COM2A1
COM2A1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case,
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case,
the compare match is ignored, but the set or clear is done at BOTTOM. See “Fast
PWM Mode” on page 126 for more details.
the compare match is ignored, but the set or clear is done at TOP. See “Phase Cor-
rect PWM Mode” on page 127 for more details.
COM2A0
COM2A0
COM2A0
0
1
0
1
0
1
0
1
0
1
0
1
Description
Normal port operation, OC2A disconnected.
Reserved
Clear OC2A on compare match, set OC2A at BOTTOM,
(non-inverting mode).
Set OC2A on compare match, clear OC2A at BOTTOM,
(inverting mode).
Description
Normal port operation, OC2A disconnected.
Reserved
Clear OC2A on compare match when up-counting. Set OC2A on
compare match when downcounting.
Set OC2A on compare match when up-counting. Clear OC2A on
compare match when downcounting.
Description
Normal port operation, OC2A disconnected.
Toggle OC2A on compare match.
Clear OC2A on compare match.
Set OC2A on compare match.
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ATmega165/V
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132
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