MC908AZ60ACFU Freescale Semiconductor, MC908AZ60ACFU Datasheet - Page 147
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MC908AZ60ACFU
Manufacturer Part Number
MC908AZ60ACFU
Description
IC MCU FLASH 8.4MHZ 60K 64QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908AZ60ACFUER.pdf
(414 pages)
Specifications of MC908AZ60ACFU
Core Processor
HC08
Core Size
8-Bit
Speed
8.4MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
52
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Chapter 12
Configuration Register (CONFIG-2)
12.1 Introduction
This chapter describes the configuration register (CONFIG-2). This register contains bits that configure
these options:
12.2 Functional Description
The configuration register is a write-once register. Out of reset, the configuration register will read the
default. Once the register is written, further writes will have no effect until a reset occurs.
AT60A — Device Indicator
EEDIVCLK — EEPROM Timebase Divider Clock Select Bit
MSCAND — MSCAN Disable Bit
Freescale Semiconductor
•
•
This read-only bit is used to distinguish an MC68HC908AS60A and MC68HC908AZ60A from older
non-’A’ suffix versions.
This bit selects the reference clock source for the EEPROM-1 and EEPROM-2 timebase divider
modules.
MSCAND disables the MSCAN module. (See
1 = ‘A’ version
0 = Non-’A’ version
1 = EExDIV clock input is driven by internal bus clock
0 = EExDIV clock input is driven by CGMXCLK
1 = MSCAN module disabled
0 = MSCAN Module enabled
Configures the device to either the MC68HC08AZxx emulator or the MC68HC08ASxx emulator
Disables the CAN module
Address:
Reset:
Read:
Write:
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
$FE09
EEDIV
Bit 7
CLK
R
0
Figure 12-1. Configuration Register (CONFIG-2)
= Reserved
R
6
0
R
5
0
MSCAND
Chapter 23 MSCAN Controller
4
1
AT60A
R
3
1
R
2
0
R
1
0
(MSCAN08)).
AZxx
Bit 0
0
147
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