MC908AZ60ACFU Freescale Semiconductor, MC908AZ60ACFU Datasheet - Page 408
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MC908AZ60ACFU
Manufacturer Part Number
MC908AZ60ACFU
Description
IC MCU FLASH 8.4MHZ 60K 64QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908AZ60ACFUER.pdf
(414 pages)
Specifications of MC908AZ60ACFU
Core Processor
HC08
Core Size
8-Bit
Speed
8.4MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
52
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Glossary
high byte — The most significant eight bits of a word.
illegal address — An address not within the memory map
illegal opcode — A nonexistent opcode.
I — The interrupt mask bit in the condition code register of the CPU08. When I is set, all interrupts are
index register (H:X) — A 16-bit register in the CPU08. The upper byte of H:X is called H. The lower
input/output (I/O) — Input/output interfaces between a computer system and the external world. A CPU
instructions — Operations that a CPU can perform. Instructions are expressed by programmers as
interrupt — A temporary break in the sequential execution of a program to respond to signals from
interrupt request — A signal from a peripheral to the CPU intended to cause the CPU to execute a
I/O — See “input/output (I/0).”
IRQ — See "external interrupt module (IRQ)."
jitter — Short-term signal instability.
latch — A circuit that retains the voltage level (logic 1 or logic 0) written to it for as long as power is applied
latency — The time lag between instruction completion and data movement.
least significant bit (LSB) — The rightmost digit of a binary number.
logic 1 — A voltage level approximately equal to the input power voltage (V
logic 0 — A voltage level approximately equal to the ground voltage (V
low byte — The least significant eight bits of a word.
low voltage inhibit module (LVI) — A module in the M68HC08 Family that monitors power supply
LVI — See "low voltage inhibit module (LVI)."
M68HC08 — A Freescale family of 8-bit MCUs.
mark/space — The logic 1/logic 0 convention used in formatting data in serial communication.
mask — 1. A logic circuit that forces a bit or group of bits to a desired state. 2. A photomask used in
mask option — A optional microcontroller feature that the customer chooses to enable or disable.
408
disabled.
byte is called X. In the indexed addressing modes, the CPU uses the contents of H:X to determine the
effective address of the operand. H:X can also serve as a temporary data storage location.
reads an input to sense the level of an external signal and writes to an output to change the level on
an external signal.
assembly language mnemonics. A CPU interprets an opcode and its associated operand(s) and
instruction.
peripheral devices by executing a subroutine.
subroutine.
to the circuit.
voltage.
integrated circuit fabrication to transfer an image onto silicon.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
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Freescale Semiconductor
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