M38869FFAHP Renesas Electronics America, M38869FFAHP Datasheet - Page 88

• Manufacturer Part Number: M38869FFAHP
• Description: IC 740 MCU FLASH 61K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38869FFAHP

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SIO, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 64
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

NOTES ON PROGRAMMING
Processor Status Register
The contents of the processor status register (PS) after a reset are
undefined, except for the interrupt disable flag (I) which is “1.” Af-
ter a reset, initialize flags which affect program execution. In
particular, it is essential to initialize the index X mode (T) and the
decimal mode (D) flags because of their effect on calculations.
Interrupts
The contents of the interrupt request bits do not change immedi-
ately after they have been written. After writing to an interrupt
request register, execute at least one instruction before perform-
ing a BBC or BBS instruction.
Decimal Calculations
• To calculate in decimal notation, set the decimal mode flag (D)
• In decimal mode, the values of the negative (N), overflow (V),
Timers
If a value n (between 0 and 255) is written to a timer latch, the fre-
quency division ratio is 1/(n+1).
Multiplication and Division Instructions
• The index X mode (T) and the decimal mode (D) flags do not af-
• The execution of these instructions does not change the con-
Ports
The contents of the port direction registers cannot be read. The
following cannot be used:
• The data transfer instruction (LDA, etc.)
• The operation instruction when the index X mode flag (T) is “1”
• The instruction with the addressing mode which uses the value
• The bit-test instruction (BBC or BBS, etc.) to a direction register
• The read-modify-write instructions (ROR, CLB, or SEB, etc.) to
Use instructions such as LDM and STA, etc., to set the port direc-
tion registers.
to “1”, then execute an ADC or SBC instruction. After executing
an ADC or SBC instruction, execute at least one instruction be-
fore executing a SEC, CLC, or CLD instruction.
and zero (Z) flags are invalid.
fect the MUL and DIV instruction.
tents of the processor status register.
of a direction register as an index
a direction register.
Serial I/O
In clock synchronous serial I/O, if the receive side is using an ex-
ternal clock and it is to output the S
enable bit, the receive enable bit, and the S
to “1.”
Serial I/O1 continues to output the final bit from the T
transmission is completed. S
impedance after transfer is completed.
When in serial I/O1 (clock-synchronous mode) or in serial I/O2, an
external clock is used as synchronous clock, write transmission
data to the transmit buffer register or serial I/O2 register, during
transfer clock is “H.”
A-D Converter
The comparator uses capacitive coupling amplifier whose charge
will be lost if the clock frequency is too low.
Therefore, make sure that f(X
A-D conversion.
Do not execute the STP or WIT instruction during an A-D conver-
sion.
D-A Converter
The accuracy of the D-A converter becomes rapidly poor under
the V
is recommended. When a D-A converter is not used, set all values
of D-Ai conversion registers (i=1, 2) to “00
Instruction Execution Time
The instruction execution time is obtained by multiplying the pe-
riod of the internal clock
execute an instruction.
The number of cycles required to execute an instruction is shown
in the list of machine instructions.
The period of the internal clock
speed mode.
When the ONW function is used in modes other than single-chip
mode, the period of the internal clock
the X
CC
IN
.
= 4.0 V or less condition; a supply voltage of V
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
by the number of cycles needed to
OUT2
IN
) is at least on 500 kHz during an
is half of the X
pin for serial I/O2 goes to high
RDY1
may be four times that of
3886 Group
16
signal, set the transmit
RDY1
.”
IN
output enable bit
period in high-
X
D pin after
CC
4.0 V
85