M306N5FCTFP Renesas Electronics America, M306N5FCTFP Datasheet - Page 115

• Manufacturer Part Number: M306N5FCTFP
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N5FCTFP

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 87
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N5)
Rev.2.40
REJ09B0011-0240
Figure 12.3 Registers DM1SL, DM0CON, and DM1CON
NOTE:
NOTES:
DMA1 Request Source Select Register
DMAi Control Register (i = 0, 1)
Apr 14, 2006
Bits DSEL3 to DSEL0
b7
b7
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b
1. The DMA1 request sources can be selected by a combination of the DMS bit and bits DSEL3 to DSEL0 in the
1.
2. At least one of bits DAD and DSD is set to 0 (address direction fixed).
b6
b6
manner described below.
The DMAS bit can be set to 0 by writing 0 in a program. (This bit remains unchanged even if 1 is written.)
b5
b5
b4
b4
b3
b3
page 93 of 372
Falling edge of INT1 pin
Software trigger
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
Timer B0
Timer B1
Timer B2
UART0 transmit
UART0 receive/ACK0
UART2 transmit
UART2 receive/ACK2
A/D conversion
UART1 receive/ACK1
b2
b2
DMS = 0 (basic request source)
b1
b1
b0
b0
Bit Symbol
Bit Symbol
DMASL
DSEL0
DSEL1
DSEL2
DSEL3
DMBIT
DMAS
DMAE
(b5-b4)
(b7-b6)
DM0CON
DM1CON
DMS
DSR
DSD
DAD
Symbol
Symbol
DM1SL
-
-
DMA request source
select bits
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
DMA request source
expansion select bit
Software DMA
request bit
Transfer unit bit
select bit
Repeat transfer mode
select bit
DMA request bit
DMA enable bit
Source address direction
select bit
Destination address
direction select bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Bit Name
Bit Name
(2)
Address
Address
03BAh
002Ch
003Ch
SI/O3
–
Two edges of INT1 pin
–
–
–
–
–
–
–
–
–
–
–
–
–
DMS = 1 (extended request source)
(2)
See NOTE 1
0 : Basic request source
1 : Extended request source
A DMA request is generated by setting
this bit to 1 when the DMS bit is 0
(basic source) and the DSEL3 to DSEL0
bits are 0001b (software trigger).
When read, the content is 0.
After Reset
After Reset
00000X00b
00000X00b
0 : 16 bits
1 : 8 bits
0 : Single transfer
1 : Repeat transfer
0 : DMA not requested
1 : DMA requested
0 : Disabled
1 : Enabled
0 : Fixed
1 : Forward
0 : Fixed
1 : Forward
00h
Function
Function
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
-
-
(1)
12. DMAC