MC9S08RD32CPE Freescale Semiconductor, MC9S08RD32CPE Datasheet - Page 157

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MC9S08RD32CPE

Manufacturer Part Number
MC9S08RD32CPE
Description
IC MCU 32K FLASH 2K RAM 28-DIP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08RD32CPE

Core Processor
HCS08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
12.3
The SCI allows full-duplex, asynchronous, NRZ serial communication among the MCU and remote
devices, including other MCUs. The SCI comprises a baud rate generator, transmitter, and receiver block.
The transmitter and receiver operate independently, although they use the same baud rate generator. During
normal operation, the MCU monitors the status of the SCI, writes the data to be transmitted, and processes
received data. The following describes each of the blocks of the SCI.
12.3.1
As shown in
SCI communications require the transmitter and receiver (which typically derive baud rates from
independent clock sources) to use the same baud rate. Allowed tolerance on this baud frequency depends
on the details of how the receiver synchronizes to the leading edge of the start bit and how bit sampling is
performed.
The MCU resynchronizes to bit boundaries on every high-to-low transition, but in the worst case, there are
no such transitions in the full 10- or 11-bit time character frame so any mismatch in baud rate is
accumulated for the whole character time. For a Freescale Semiconductor SCI system whose bus
frequency is driven by a crystal, the allowed baud rate mismatch is about ±4.5 percent for 8-bit data format
and about ±4 percent for 9-bit data format. Although baud rate modulo divider settings do not always
produce baud rates that exactly match standard rates, it is normally possible to get within a few percent,
which is acceptable for reliable communications.
12.3.2
This section describes the overall block diagram for the SCI transmitter
specialized functions for sending break and idle characters.
The transmitter is enabled by setting the TE bit in SCI1C2. This queues a preamble character that is one
full character frame of the idle state. The transmitter then remains idle until data is available in the transmit
data buffer. Programs store data into the transmit data buffer by writing to the SCI data register (SCI1D).
The central element of the SCI transmitter is the transmit shift register that is either 10 or 11 bits long
depending on the setting in the M control bit. For the remainder of this section, we will assume M = 0,
selecting the normal 8-bit data mode. In 8-bit data mode, the shift register holds a start bit, eight data bits,
and a stop bit. When the transmit shift register is available for a new SCI character, the value waiting in
Freescale Semiconductor
Functional Description
Baud Rate Generation
Transmitter Functional Description
Figure
BUSCLK
12-11, the clock source for the SCI baud rate generator is the bus-rate clock.
BAUD RATE GENERATOR
OFF IF [SBR12:SBR0] = 0
MODULO DIVIDE BY
(1 THROUGH 8191)
Figure 12-11. SCI Baud Rate Generation
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
SBR12:SBR0
BAUD RATE =
DIVIDE BY
16
Rx SAMPLING CLOCK
(16 × BAUD RATE)
[SBR12:SBR0] × 16
BUSCLK
Tx BAUD RATE
Serial Communications Interface (S08SCIV1)
(Figure
12-1), as well as
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