R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1147

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Table 23.5 Endian Operation (32-Bit Width Access)
Table 23.6 Endian Operation (16-Bit Width Access)
Note:
Table 23.7 Endian Operation (8-Bit Width Access)
Note:
FEND
0
1
FEND
0
1
FEND
0
1
* Reading a disabled register in word units is prohibited.
* Reading a disabled register in byte units is prohibited.
Bits 31 to 24
Even address
Write: Disabled
Read: Prohibited*
Bits 31 to 24
N+0 address
N+3 address
Bits 31 to 24
Write: Enabled
Read: Enabled
Write: Disabled
Read: Prohibited*
Bits 23 to 16
N+1 address
N+2 address
Bits 23 to 16
Odd address
Write: Disabled
Read: Prohibited*
Bits 23 to 16
Write: Disabled
Read: Disabled*
Write: Disabled
Read: Prohibited*
Section 23 USB 2.0 Host/Function Module (USB)
Rev. 3.00 Sep. 28, 2009 Page 1115 of 1650
Bits 15 to 8
N+2 address
N+1 address
Bits 15 to 8
Write: Disabled
Read: Prohibited*
Odd address
Bits 15 to 8
Write: Disabled
Read: Disabled*
Write: Disabled
Read: Prohibited*
Bits 7 to 0
Write: Disabled
Read: Disabled*
Write: Enabled
Read: Enabled
Bits 7 to 0
N+3 address
N+0 address
Bits 7 to 0
Write: Disabled
Read: Prohibited*
Even address
REJ09B0313-0300