R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1311

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

5. Packed 2bpp (Pixel Alignment in Byte is Little Endian)
6. Packed 4bpp (Pixel Alignment in Byte is Little Endian)
7. Unpacked 4bpp [Windows CE Recommended Format]
8. Unpacked 5bpp [Windows CE Recommended Format]
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
MSB
MSB
MSB
MSB
7
P03
P07
P13
P17
7
7
7
6
6
6
6
P01
P03
P05
P11
P13
P15
Display Memory
Display Memory
Display Memory
Display Memory
P02
P06
P12
P16
5
5
5
5
…
…
…
…
…
…
…
…
4
4
4
4
P01
P05
P11
P15
3
3
3
3
P00
P01
P02
P10
P11
P12
2
2
2
2
P00
P02
P04
P10
P12
P14
P00
P01
P02
P10
P11
P12
1
P00
P04
P10
P14
1
1
1
LSB
LSB
LSB
LSB
0
0
0
0
[Bit]
(Byte0)
(Byte1)
[Bit]
(Byte0)
(Byte1)
(Byte2)
[Bit]
(Byte0)
(Byte1)
(Byte2)
[Bit]
(Byte0)
(Byte1)
(Byte2)
Rev. 3.00 Sep. 28, 2009 Page 1279 of 1650
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
Section 24 LCD Controller (LCDC)
↓ Top Left Pixel
↓ Top Left Pixel
↓ Top Left Pixel
↓ Top Left Pixel
LAO: Line Address Offset
LAO: Line Address Offset
LAO: Line Address Offset
LAO: Line Address Offset
Pn = Pn[1:0]: Put 2-bit data
Pn = Pn[3:0]: Put 4-bit data
Pn = Pn[3:0]: Put 4-bit data
Pn = Pn[4:0]: Put 5-bit data
—Unused bits should be 0
—Unused bits should be 0
—Unused bits should be 0
—Unused bits should be 0
Display
Display
Display
Display
…
…
…
…
…
…
…
…
REJ09B0313-0300
…
…
…
…
…
…
…
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