MC68711E20CFNE3 Freescale Semiconductor, MC68711E20CFNE3 Datasheet - Page 22

IC MCU 8BIT 52-PLCC

MC68711E20CFNE3

Manufacturer Part Number
MC68711E20CFNE3
Description
IC MCU 8BIT 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68711E20CFNE3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
M687xx
Core
HC11
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Operating Modes and Memory
If this mode is entered out of reset, the EPROM is located at $7000–$7FFF and vector accesses are from
external memory. To be in expanded-multiplexed mode with EPROM located at $F000–$FFFF, it is
necessary to start in single-chip mode, executing out of EPROM, and then set the MDA bit of the HPRIO
register to switch mode.
2.2.3 Special Bootstrap Mode (BOOT)
This special mode is similar to single-chip mode. The resident bootloader program contains a 256-byte
program in a special on-chip read-only memory (ROM). The user downloads a small program into
on-board RAM using the SCI port. Program control is passed to RAM when an idle line of at least four
characters occurs. In this mode, all interrupt vectors are mapped to RAM (see
can set up a jump table, if desired.
Bootstrap mode (BOOT) is entered out of reset if the voltage level on both MODA and MODB is low. The
programming aspect of bootstrap mode, used to program the one-time programmable ROM (OTPROM)
through the MCU, is entered automatically if IRQ is low and programming voltage is available on the V
pin. IRQ should be pulled up while in reset with MODA and MODB configured for bootstrap mode to
prevent unintentional programming of the EPROM.
This versatile mode (BOOT) can be used for test and diagnostic functions on completed modules and for
programming the on-board PROM. The serial receive logic is initialized by software in the bootloader
ROM, which provides program control for the SCI baud rate and word format. Mode switching to other
modes can occur under program control by writing to the SMOD and MDA bits of the HPRIO register. Two
special bootloader functions allow either an immediate jump-to-RAM at memory address $0000 or an
immediate jump-to-EPROM at $F000.
22
R/W, AS, and the high-order address bus (port B) are inputs in single-chip
mode. These inputs may need to be pulled up so that off-chip accesses
cannot occur while the MCU is in single-chip mode.
Address
00CD
00DC
00CA
00DF
00C4
00C7
00D0
00D3
00D6
00D9
00E3
00E5
00E8
Table 2-2. Bootstrap Mode Jump Vectors
SCI
SPI
Pulse accumulator input edge
Pulse accumulator overflow
Timer overflow
Timer output compare 5/input capture 4
Timer output compare 4
Timer output compare 3
Timer output compare 2
Timer output compare 1
Timer input capture 3
Timer input capture 2
Timer input capture 1
MC68HC711D3 Data Sheet, Rev. 2.1
NOTE
Vector
Table
Freescale Semiconductor
2-2), so that the user
PP

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