MAX6882ETE+ Maxim Integrated Products, MAX6882ETE+ Datasheet - Page 3

• Manufacturer Part Number: MAX6882ETE+
• Description: IC SEQUENCE/SUPERVISOR 16TQFN
• Manufacturer: Maxim Integrated Products
• Type: Sequencerr

Specifications of MAX6882ETE+

• Number Of Voltages Monitored: 2
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: Adjustable/Selectable
• Voltage - Threshold: Adjustable/Selectable
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TQFN Exposed Pad
• Monitored Voltage: - 0.3 V to + 6 V
• Manual Reset: Resettable
• Watchdog: No Watchdog
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Supply Current (typ): 1100 uA
• Maximum Power Dissipation: 1349 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ELECTRICAL CHARACTERISTICS (continued)
(IN1, IN2, or IN3 = +2.7V to +5.5V, EN/UV = MARGIN = ABP, T
at T
Note 1: Specifications guaranteed for the stated global conditions. 100% production tested at T
Note 2: A current I
Note 3: The total DELAY is t
Note 4: A current I
Note 5: During power-up, only the condition OUT_ < ramp - V
Note 6: A 100Ω pulldown to GND activated by a fault condition. See the Internal Pulldown section.
Power-Good Threshold
Power-Good Threshold Hysteresis
GATE_ Output High
GATE_ Pullup Current
GATE_ Pulldown Current
SET_ to GATE_ Delay
PG/RST Output Low
Tracking Differential Voltage Stop
Ramp
Tracking Differential Fault Voltage
Power-Low Threshold
Power-Low Hysteresis
OUT to GND Pulldown Impedance
MARGIN Pullup Current
MARGIN Input Voltage
MARGIN Glitch Rejection
A
= +25°C, unless otherwise noted.) (Note 1)
Specifications at T
least one of IN1/IN2/IN3 is between 2.7V to 5.5V, while the remaining IN1/IN2/IN3 are between 0 and 5.5V.
ence for t
t
OUT_ < ramp – V
V
cause a fault (see Figure 10). Therefore, if OUT1, OUT2, and OUT3 (during power-up tracking and power-down) differ by
more than 2 x V
TIMEOUT
TRK
is checked in order to stop the ramp. However, both conditions OUT_ < ramp - V
DELAY
= 200µs + (500kΩ x C
D
S
= 25µA ±10% is generated internally and used as a reference for t
_______________________________________________________________________________________
= 2.5µA ±15% is generated internally and is used to set the DELAY and TIMEOUT periods and used as a refer-
TRK_F
and t
TRK_F
A
DELAY
= -40°C to +85°C are guaranteed by design. These devices meet the parameters specified when at
TIMEOUT
, a fault condition is asserted.
and OUT_ > ramp + V
= 200µs + (500kΩ x C
Dual-/Triple-Voltage, Power-Supply
V
.
V
TH_PLHYS
t
V
V
V
D-GATE
HYS_PG
TIMEOUT
V
V
TH_PG
I
I
TRK_F
TH_PL
V
GUP
I
GDS
V
GOH
V
I
GD
TRK
IN
OL
IH
IL
). Leave TIMEOUT unconnected for 200µs timeout.
V
V
I
During power-up and power-down,
V
During power-up and power-down,
V
When disabled, V
When disabled, V
SET falling, 25mV overdrive
V
V
Differential between each of the OUT_ and
the ramp voltage during power-up and
power-down, Figure 1 (Note 5)
Differential between each of the OUT_ and
the ramp voltage, Figure 1 (Note 5)
OUT_ falling
OUT_ rising
IN_ > 2.7V (Note 6)
SOURCE
OUT_
OUT_
GATE_
GATE_
IN_
IN_
≥ 2.7V, I
≥ 4.0V, I
TRK_F
falling
rising
DELAY
= 1V
= 5V
= 0.5µA
cause a fault. During power-down, only the condition OUT > ramp +
TRK
SINK
SINK
). Leave DELAY unconnected for 200µs delay. The total TIMEOUT is
A
Sequencers/Supervisors
= -40°C to +85°C, unless otherwise specified. Typical values are
is checked in order to stop the ramp. However, both conditions
GATE_
GATE_
= 1mA, output asserted
= 4mA, output asserted
= 5V, V
= 5V, V
IN_
IN_
≥ 2.7V
≥ 4V
FAULT
, t
RETRY
TRK_F
IN_ +
91.5
200
125
4.2
2.5
2.5
2.0
75
7
, and slew rate.
A
and OUT_ > ramp + V
= +25°C and T
IN_ +
92.5
125
250
142
100
100
0.5
5.0
9.5
20
10
10
10
4
4
IN_ +
93.5
180
310
170
5.8
0.3
0.4
0.8
13
A
= +85°C.
TRK_F
mA
mV
mV
mV
mV
µA
µA
µA
µs
ns
%
%
Ω
V
V
V
3