AT91SAM7S64C-AU Atmel, AT91SAM7S64C-AU Datasheet - Page 43

• Manufacturer Part Number: AT91SAM7S64C-AU
• Description: IC ARM7 MCU 32BIT 64K 64LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S64C-AU

• Package / Case: 64-LQFP
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 55MHz
• Number Of I /o: 32
• Core Processor: ARM7
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Core Size: 16/32-Bit
• Core: ARM7TDMI
• Package: 64LQFP
• Device Core: ARM7TDMI
• Family Name: AT91
• Maximum Speed: 55 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 32
• Interface Type: SPI/TWI/USART/USB
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT91SAM7S64B-AU::AT91SAM7S64B-AU

11.2.4.1
6175K–ATARM–30-Aug-10
Modes and Exception Handling
Table 11-1.
Registers R0 to R7 are unbanked registers. This means that each of them refers to the same 32-
bit physical register in all processor modes. They are general-purpose registers, with no special
uses managed by the architecture, and can be used wherever an instruction allows a general-
purpose register to be specified.
Registers R8 to R14 are banked registers. This means that each of them depends on the current
mode of the processor.
All exceptions have banked registers for R14 and R13.
After an exception, R14 holds the return address for exception processing. This address is used
to return after the exception is processed, as well as to address the instruction that caused the
exception.
R13 is banked across exception modes to provide each exception handler with a private stack
pointer.
The fast interrupt mode also banks registers 8 to 12 so that interrupt processing can begin with-
out having to save these registers.
User and
System Mode
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
PC
CPSR
ARM7TDMI ARM Modes and Registers Layout
Supervisor
Mode
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13_SVC
R14_SVC
PC
CPSR
SPSR_SVC
Abort Mode
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13_ABORT
R14_ABORT
PC
CPSR
SPSR_ABORT
AT91SAM7S Series Preliminary
Undefined
Mode
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13_UNDEF
R14_UNDEF
PC
CPSR
SPSR_UNDEF
Interrupt
Mode
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13_IRQ
R14_IRQ
PC
CPSR
SPSR_IRQ
Mode-specific banked registers
Fast Interrupt
Mode
R0
R1
R2
R3
R4
R5
R6
R7
R8_FIQ
R9_FIQ
R10_FIQ
R11_FIQ
R12_FIQ
R13_FIQ
R14_FIQ
PC
CPSR
SPSR_FIQ
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