MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 271

• Manufacturer Part Number: MCF5214CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5214CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

14.2.14.7 Debug Data (DDATA[3:0])
Debug data signals (DDATA[3:0]) display captured processor addresses, data and breakpoint status.
These pins can also be configured as GPIO PDD[7:4].
14.2.14.8 Processor Status Outputs (PST[3:0])
PST[3:0] outputs indicate core status, as shown below in
with the processor clock; status is unrelated to the current bus transfer.
These pins can also be configured as GPIO PDD[3:0].
14.2.15 Test Signals
14.2.15.1 Test (TEST)
This input signal is reserved for factory testing only and should be connected to VSS to prevent
unintentional activation of test functions.
Freescale Semiconductor
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
PST[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Table 14-7. Processor Status Encoding
Continue execution
Begin execution of an instruction
Reserved
Entry into user mode
Begin execution of PULSE and WDDATA instruction
Begin execution of taken branch
Reserved
Begin execution of RTE instruction
Begin one-byte transfer on DDATA
Begin two-byte transfer on DDATA
Begin three-byte transfer on DDATA
Begin four-byte transfer on DDATA
Exception Processing
Emulator-Mode Exception Processing
Processor is stopped
Processor is halted
Definition
Table
14-7. Debug mode timing is synchronous
Signal Descriptions
14-31