71M6532D-IGTR/F Maxim Integrated Products, 71M6532D-IGTR/F Datasheet - Page 85
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71M6532D-IGTR/F
Manufacturer Part Number
71M6532D-IGTR/F
Description
IC ENERGY METER 128KB 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.71M6531D-IMRF.pdf
(120 pages)
Specifications of 71M6532D-IGTR/F
Mounting Style
SMD/SMT
Package / Case
LQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
71M6532D-IGTR/F
Manufacturer:
Maxim Integrated
Quantity:
10 000
FDS 6531/6532 005
v1.3
PLS_INV
PREBOOT
PREG[16:0]
PRE_SAMPS[1:0] 2001[7:6]
QREG[1:0]
RST_SUBSEC
RTCA_ADJ[6:0]
RTC_SEC[5:0
RTC_MIN[5:0]
RTC_HR[4:0]
RTC_DAY[2:0]
RTC_DATE[4:0]
RTC_MO[3:0]
RTC_YR[7:0]
RTM_E
RTM0[9:0]
RTM1[9:0]
RTM2[9:0]
RTM3[9:0]
Name
2004[6]
SFRB2[7]
201C[2:0]
201D[7:0]
201E[7:2]
201E[1:0]
2010[0]
2011[6:0]
2015
2016
2017
2018
2019
201A
201B
2002[3]
2060[9:8]
2061[7:0]
2062[9:8]
2063[7:0]
2064[9:8]
2064[7:0]
2065[9:8]
2066[7:0]
Location
Reset
40
0
–
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
*
*
*
*
*
*
*
Wake
NV
NV
NV
NV
NV
NV
NV
0
–
4
0
0
0
0
0
–
0
0
0
0
0
0
0
0
0
© 2005-2010 TERIDIAN Semiconductor Corporation
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Dir
R
Inverts the polarity of the pulse outputs. Normally, these pulses are active low. When
inverted, they become active high.
Indicates that the preboot sequence is active.
RTC adjust. See Section
PREG[16:0] and QREG[1:0] are separate in hardware but can be programmed with a
single number calculated by the MPU.
The duration of the pre-summer, in samples.
RTC adjust. See Section
The sub-second counter is restarted when a 1 is written to this bit.
Analog RTC adjust. See Section
These are the year, month, day, hour, minute and second parameters of the RTC.
Writing to these registers sets the time. Each write operation to one of these registers
must be preceded by a write to 0x201F (WE). Valid values for each parameter are:
Values in the RTC registers are undefined when the IC powers up without a battery but
are maintained through mission and battery modes when a sufficient voltage is maintained
at the VBAT pin.
* no change of value at reset.
Real Time Monitor (RTM) enable. When 0, the RTM output is low.
The four RTM probes. Before each CE code pass, the values of these registers are
serially output on the RTM pin. The RTM registers are ignored when RTM_E = 0.
PRE_SAMPS[1:0]
0x0FFBF ≤ PREG[16:0] ≤ 0x10040
SEC: 00 to 59, MIN: 00 to 59, HR: 00 to 23 (00 = Midnight)
DAY: 01 to 07 (01 = Sunday), DATE: 01 to 31, MO: 01 to 12
YR: 00 to 99 (00 and all others divisible by 4 are leap years)
00
01
10
11
Pre-summer Duration
1.5.3 Real-Time Clock (RTC)
1.5.3 Real-Time Clock (RTC)
1.5.3 Real-Time Clock (RTC)
100
42
50
84
Description
Data Sheet 71M6531D/F-71M6532D/F
for additional details.
for additional details.
for additional details.
85