EM35X-BBRD Ember, EM35X-BBRD Datasheet - Page 54
![EM35X BREAKOUT BOARD](/photos/14/8/140871/em35x-bbrd_sml.jpg)
EM35X-BBRD
Manufacturer Part Number
EM35X-BBRD
Description
EM35X BREAKOUT BOARD
Manufacturer
Ember
Datasheet
1.EM35X-DEV-UPG-IAR.pdf
(245 pages)
Specifications of EM35X-BBRD
Frequency
2.4GHz
For Use With/related Products
EM35x
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
636-1013
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7
7.1
GPIO (General Purpose Input / Output)
GPIO Ports
The EM35x has 24 multi-purpose GPIO pins, which may be individually configured as:
The basic structure of a single GPIO is illustrated in Figure 7-1.
A Schmitt trigger converts the GPIO pin voltage to a digital input value. The digital input signal is then always
routed to the GPIO_PxIN register; to the alternate inputs of associated peripheral devices; to wake detection
logic if wake detection is enabled; and, for certain pins, to interrupt generation logic. Configuring a pin in
analog mode disconnects the digital input from the pin and applies a high logic level to the input of the
Schmitt trigger.
Only one device at a time can control a GPIO output. The output is controlled in normal output mode by the
GPIO_PxOUT register and in alternate output mode by a peripheral device. When in input mode or analog
mode, digital output is disabled.
The 24 GPIO pins are grouped into three ports: PA, PB, and PC. Individual GPIOs within a port are numbered 0
to 7 according to their bit positions within the GPIO registers.
Note: Because GPIO port registers’ functions are identical, the notation Px is used here to refer to PA, PB, or
PC. For example, GPIO_PxIN refers to the registers GPIO_PAIN, GPIO_PBIN, and GPIO_PCIN.
General purpose output
General purpose open-drain output
Alternate output controlled by a peripheral device
Alternate open-drain output controlled by a peripheral device
Analog
General purpose input
General purpose input with pull-up or pull-down resistor
Figure 7-1. GPIO Block Diagram
Final
7-1
EM351 / EM357
120-035X-000G
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