CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 160
CSM9S12XDT512SLK
Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet
1.MC9S12XD64CAA.pdf
(1348 pages)
Specifications of CSM9S12XDT512SLK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Chapter 5 Analog-to-Digital Converter (S12ATD10B8CV2)
5.1.2.2
5.1.3
Figure 5-1
5.2
This section lists all inputs to the ATD block.
5.2.1
This pin serves as the analog input channel x. It can also be configured as general purpose digital port pin
and/or external trigger for the ATD conversion.
5.2.2
These inputs can be configured to serve as an external trigger for the ATD conversion.
Refer to the device overview chapter for availability and connectivity of these inputs.
5.2.3
V
5.2.4
These pins are the power supplies for the analog circuitry of the ATD block.
160
RH
•
•
•
is the high reference voltage and V
Stop mode
Entering stop mode causes all clocks to halt and thus the system is placed in a minimum power
standby mode. This aborts any conversion sequence in progress. During recovery from stop mode,
there must be a minimum delay for the stop recovery time t
conversion sequence.
Wait mode
Entering wait mode the ATD conversion either continues or aborts for low power depending on the
logical value of the AWAIT bit.
Freeze mode
In freeze mode the ATD will behave according to the logical values of the FRZ1 and FRZ0 bits.
This is useful for debugging and emulation.
External Signal Description
shows a block diagram of the ATD.
Block Diagram
ANx (x = 7, 6, 5, 4, 3, 2, 1, 0) — Analog Input Pin
ETRIG3, ETRIG2, ETRIG1, and ETRIG0 — External Trigger Pins
V
V
MCU Operating Modes
RH
DDA
and V
and V
RL
SSA
— High and Low Reference Voltage Pins
— Power Supply Pins
MC9S12XDP512 Data Sheet, Rev. 2.21
RL
is the low reference voltage for ATD conversion.
SR
before initiating a new ATD
Freescale Semiconductor
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